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參數(shù)資料
| 型號(hào)： | MK2069-02GI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 160 MHz, OTHER CLOCK GENERATOR, PDSO56 |
| 封裝： | 6.10 MM, 0.50 MM PITCH, TSSOP-56 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 210K |
| 代理商： | MK2069-02GI |
MK2069-02
VCXO-BASED CLOCK JITTER ATTENUATOR AND TRANSLATOR
VCXO AND SYNTHESIZER
IDT VCXO-BASED CLOCK JITTER ATTENUATOR AND TRANSLATOR
19
MK2069-02
REV G 050203
Note 1: This is the recommended crystal operating range. A crystal as low as 8 MHz can be used, although this may
result in increased output phase noise.
Note 2: The VCXO crystal will be pulled to its minimum frequency when there is no input clock (CLR = 1) due to the
attempt of the PLL to lock to 0 Hz.
Note 3: The minimum practical phase detector frequency is assumed to be 1 kHz. Through proper loop filter design
lower input frequencies may be possible. Phase detector frequencies as low as 400Hz have been
implemented.
Note 4: The output of RCLK is a positive pulse with a duration equal to VCLK high time, or half the VCLK period.
Note 5: Referenced to ICLK, the skews of VCLK, RCLK and TCLK increase together when leakage is present in the
external VCXO PLL loop filter.
Output Fall Time, VCLK and
RCLK
tOF
2.0 to 0.8V, CL=15pF
1.5
2
ns
Output Rise Time, TCLK
tOR
0.8 to 2.0V, CL=15pF
0.75
1
ns
Output Fall Time, TCLK
tOF
2.0 to 0.8V, CL=15pF
0.75
1
ns
Skew, ICLK to VCLK (Note 5)
tIV
Rising edges, CL=15pF
-5
2.5
+10
ns
Skew, ICLK to RCLK (Note 5)
tIV
Rising edges, CL=15pF
+5
10
+20
ns
Skew, ICLK to TCLK (Note 5)
tVT
Rising edges, CL=15pF
-5
1.5
+10
ns
Nominal Output Impedance
ZOUT
20
Ω
Parameter
Symbol
Conditions
Min.
Typ.
Max. Units
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2069-03 | 制造商:ICS 制造商全稱:ICS 功能描述:VCXO-Based Clock Translator with High Multiplication |
| MK2069-03GI | 功能描述:IC VCXO CLK TRANSLATOR 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| MK2069-03GITR | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 VCXO-BASED CLOCK TRANSLATOR RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MK2069-04 | 制造商:ICS 制造商全稱:ICS 功能描述:VCXO-Based Universal Clock Translator |
| MK2069-04GI | 功能描述:IC VCXO CLK TRANSLATOR 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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