參數(shù)資料
型號(hào): MK1493-05GILF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 1493 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO16
封裝: 0.173 INCH, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-16
文件頁(yè)數(shù): 12/14頁(yè)
文件大?。?/td> 292K
代理商: MK1493-05GILF
MK1493-05
DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
CLOCK SYNTHESIZER
IDT DIFFERENTIAL SPREAD SPECTRUM CLOCK DRIVER
7
MK1493-05
REV J 051310
Byte 6: Control Register
Notes:
1. These bits are read-only when the hardware/software bit is set to hardware control.
2. When the hardware/software bit is set to hardware control these bits reflect the state of the S[3:1] and SEL100/96#
pins and the SO bit is set to zero. When the hardware/software bit is set to software control the S[3:1] and SEL100/96# pins
are overridden by these bits.
3. See Spread Spectrum Selection Table on page 2 for spread selection options.
4. Use the same vendor ID as is used for the CK408 clock chip.
Power Down Mode Operation
The Power Down pin is used to shut off the clock cleanly prior to shutting off power to the device. The power down
pin is an active high asynchronous input. When PWRDWN is sampled low for two output clock periods then all
clocks need to be stopped prior to turning off the VCO. ALL clocks need to be stopped in a predictable manner.
CLKOUT is driven differentially when PWRDWN# is de-asserted unless the CLKOUT is disabled through the SMBus register
bit.
Bit
Description
Type
Power Up
Output(s) Affected
Notes
7
Revision ID bit 3
R
--
Not applicable
6
Revision ID bit 2
R
--
Not applicable
5
Revision ID bit 1
R
--
Not applicable
4
Revision ID bit 0
R
--
Not applicable
3
Vendor ID bit 3
R
--
Not applicable
4
2
Vendor ID bit 2
R
--
Not applicable
4
1
Vendor ID bit 1
R
--
Not applicable
4
0
Vendor ID bit 0
R
--
Not applicable
4
CLKO U T/
CLKO UT
CLKIN
REFO UT
PW RD N
C LK VCO
ON
OFF
TpH Z
相關(guān)PDF資料
PDF描述
MK1493-05G 1493 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO16
MK1574-01ASILF 1574 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
MK1574-01BSILFTR 1574 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
MK1574-01ASILFTR 1574 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
MK1574-01BSILF 1574 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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參數(shù)描述
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