
Networking/PCI Clock Generator
MDS 1493-02A C
14
Revision 020204
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1493-02A
Byte 21: Slew Rate Control Register
Byte 22: Slew Rate Control Register
Note for PCI_X frequency selection of 133.33 MHz
use 11=1.0X buffer s.
Byte 23: Slew Rate Control Register
Bit
Name
PUP
Description
Bit 7
REF0
0
Clock slew rate control bits.
01 = strong: 11 = 00 medium: 10 = weak
Bit 6
1
Bit 5
RESERVED
X
RESERVED
Bit 4
RESERVED
X
RESERVED
Bit 3
PCI (1:0)
0
Clock slew rate control bits.
(00=0.7X, 01=0.8X, 10=0.90X, 11=1.0X)
Bit 2
1
Bit 1
PCI (3:2)
0
Clock skew rate control bits.
(00=0.7X, 01=0.8X, 10=0.90X, 11=1.0X)
Bit 0
1
Bit
Name
PUP
Description
Bit 7
PCI_X6
0
Clock slew rate control bits.
AGP Phase Inversion bit
Bit 6
1
Bit 5
PCI_X(5)
0
Clock slew rate control bits.
(00=0.63X, 01=0.75X, 10=0.88X, 11=1.0X)
Bit 4
1
Bit 3
PCI_X(4:3:2)
0
Clock slew rate control bits.
(00=0.63X, 01=0.75X, 10=0.88X, 11=1.0X)
Bit 2
1
Bit 1
PCI_X(1:0)
0
Clock slew rate control bits.
(00=0.63X, 01=0.75X, 10=0.88X, 11=1.0X)
Bit 0
1
Bit
Name
PUP
Description
Bit 7
RESERVED
X
RESERVED
Bit 6
X
Bit 5
RESERVED
X
RESERVED
Bit 4
X
Bit 3
IREFSGL
1
00 = 5x, 01 = 4x, 10 = 6x, 11 = 7x
Bit 2
0
Bit 1
REF_50M
0
Clock slew rate control bits.
01 = strong: 11 = 00 medium: 10 = weak
Bit 0
1