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參數(shù)資料
| 型號： | MK1412ATR |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 49.152 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 61K |
| 代理商： | MK1412ATR |
MK1412
MPEG Audio Clock Synthesizer
MDS 1412 B
2
Revision 060200
Printed 11/15/00
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800tel www.icst.com
Number
Name
Type Description
1
X1
I
Crystal Connection. Connect to a 14.31818 MHz crystal or clock.
2
VDD
P
Connect to +3.3V or +5V.
3
GND
P
Connect to ground.
4
CLK/2
O
Audio Clock divide by 2 output as per table above.
5
S0
I
Frequency Select 0 Input. Determines CLK and CLK/2 outputs as per table above.
6
S1
I
Frequency Select 0 Input. Determines CLK and CLK/2 outputs as per table above.
7
CLK
O
Audio Clock output as per table above.
8
X2
O
Crystal Connection to a 14.31818 MHz crystal, or leave unconnected for clock input.
Pin Descriptions
Key: I = Input, O = output, P = power supply connection
Pin Assignment
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. For a crystal input, one
load capacitor can be connected to each of the X1 and X2 pins and ground, and a parallel resonant
14.31818 MHz crystal is recommended. The value (in pF) of each crystal load capacitor should equal
(CL-18)*2, where CL is the crystal’s load (correlation) capacitance in pF. So for crystals with 18 pF load
capacitance (or less), no extra capacitors are needed. The frequency tolerance of the crystal should be
50ppm or better. For a clock input, connect to X1 and leave X2 unconnected. A decoupling capacitor of
0.1F should be connected between VDD and GND on pins 2 and 3, and 33
terminating resistor may
be used on the clock outputs if the trace is longer than 1 inch.
8 pin SOIC
Audio Clock Outputs Select Table (MHz)
1
8
2
3
4
7
6
5
X1
GND
X2
VDD
CLK
S1
CLK/2
S0
S1
S0
CLK
CLK/2
Accuracy
0
16.384
8.192
1 ppm
0
1
22.5792
11.2896
25 ppm
1
0
24.576
12.288
1 ppm
1
49.152
24.576
1 ppm
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MK1412S | 制造商:ICS 制造商全稱:ICS 功能描述:MPEG Audio Clock Synthesizer |
| MK1412STR | 制造商:ICS 制造商全稱:ICS 功能描述:MPEG Audio Clock Synthesizer |
| MK1413 | 制造商:ICS 制造商全稱:ICS 功能描述:MPEG Audio Clock Synthesizer |
| MK1413S | 功能描述:IC AUDIO CLK SOURCE MPEG 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| MK1413SLF | 功能描述:時鐘發(fā)生器及支持產品 MPEG AUDIO CLOCK SOURCE RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
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