參數(shù)資料
型號(hào)： MK10X512VLQ100
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, LQFP-144
文件頁數(shù)： 8/66頁
文件大?。?/td> 984K
代理商： MK10X512VLQ100
5.1.5 Power consumption operating behaviors
Table 5. Power consumption operating behaviors
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
IDD_RUN
Run mode current — all peripheral clocks disa‐
bled, code executing from flash
@ 1.8V
@ 3.0V
—
40
42
TBD
mA
IDD_RUN
Run mode current — all peripheral clocks ena‐
bled, code executing from flash
@ 1.8V
@ 3.0V
—
55
56
TBD
mA
IDD_RUN_M
AX
Run mode current — all peripheral clocks ena‐
bled and peripherals active, code executing from
flash
@ 1.8V
@ 3.0V
—
85
TBD
mA
IDD_WAIT
Wait mode current at 3.0 V — all peripheral
clocks disabled
—
15
TBD
mA
IDD_STOP Stop mode current at 3.0 V
—
1.4
TBD
mA
IDD_VLPR Very-low-power run mode current at 3.0 V — all
peripheral clocks disabled
—
1.25
TBD
mA
IDD_VLPR Very-low-power run mode current at 3.0 V — all
peripheral clocks enabled
—
TBD
mA
IDD_VLPW Very-low-power wait mode current at 3.0 V
—
1.05
TBD
mA
IDD_VLPS
Very-low-power stop mode current at 3.0 V
—
30
TBD
μA
IDD_LLS
Low leakage stop mode current at 3.0 V
—
12
TBD
μA
IDD_VLLS3 Very low-leakage stop mode 3 current at 3.0 V
128KB RAM devices
64KB RAM devices
32KB RAM devices
—
8
6
5
TBD
μA
IDD_VLLS2 Very low-leakage stop mode 2 current at 3.0 V
—
4
TBD
μA
IDD_VLLS1 Very low-leakage stop mode 1 current at 3.0 V
—
2
TBD
μA
IDD_VBAT Average current when CPU is not accessing
RTC registers at 3.0 V
—
550
TBD
nA
1. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock . MCG configured for FEI mode.
All peripheral clocks disabled.
2. 100MHz core and system clock, 50MHz bus and FlexBus clocks, and 25MHz flash clock. MCG configured for FEI mode.
All peripheral clocks enabled, but peripherals are not in active operation.
3. 100MHz core and system clock, 50MHz bus and FlexBus clocks, and 25MHz flash clock. MCG configured for FEI mode.
All peripheral clocks enabled, and peripherals are in active operation.
4. 25MHz core and system clock, 25MHz bus clock, and 12.5MHz FlexBus and flash clocks. MCG configured for FEI mode.
5. 2 MHz core, system, bus and FlexBus clock and 1MHz flash clock. MCG configured for fast IRCLK mode. All peripheral
clocks disabled. Code executing from flash.
General
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
16
Preliminary
Freescale Semiconductor, Inc.
Preliminary
相關(guān)PDF資料
PDF描述
MK10X512VMD100 RISC MICROCONTROLLER, PBGA144
MK1493-02AGTR 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AGLF 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AGLFTR 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AG 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MK10X512VLQ100R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet
MK10X512VLQ120 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet
MK10X512VLQ120R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet
MK10X512VLQ150 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet
MK10X512VLQ150R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet
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