參數(shù)資料
型號: MICRF405YML TR
廠商: Micrel Inc
文件頁數(shù): 8/46頁
文件大?。?/td> 649K
描述: TRANSMITTER ASK/FSK 24-MLF
標(biāo)準(zhǔn)包裝: 1
頻率: 290MHz ~ 980MHz
應(yīng)用: ISM
調(diào)制或協(xié)議: ASK,F(xiàn)SK
數(shù)據(jù)傳輸率 - 最大: 200 kbps
功率 - 輸出: 10dBm
電流 - 傳輸: 18mA
數(shù)據(jù)接口: PCB,表面貼裝
天線連接器: PCB,表面貼裝
電源電壓: 2.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
封裝/外殼: 24-VFQFN 裸露焊盤,24-MLF?
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 571 (CN2011-ZH PDF)
其它名稱: 576-1965-6
Micrel
MICRF405
 
 
 
 
April 2006 
8
M9999-041906
 (408) 955-1690
 
Programming Interface Timing
Figure 1 and Table 2 shows the timing specification
for the 3-wire serial programming interface.
 
 
 
Figure 1. Programming Interface Timing.
 
Values
 
Symbol
 
Parameter
Min.
Typ.
Max.
 
Units
Tper
Min. period of SCK
50
 
 
ns
Thigh
Min. high time of SCK
20
 
 
ns
Tlow
Min. low time of SCK
20
 
 
ns
Tfall
Max. time of falling edge of SCK
 
 
1
Trise
Max. time of rising edge of SCK
 
 
1
Tsenf
Min. time of falling edge of SEN to falling edge of SCK
0
 
 
ns
Tsenr
Min. delay from rising edge of SEN to rising edge of SCK
5
 
 
ns
Twrite
Min. delay from valid SIO to falling edge of SCK during a
write operation
0
 
 
ns
Tread
Min. delay from rising edge of SCK to valid SIO during a read
operation (assuming load capacitance of SIO is 25pF)
75
 
 
ns
Trdy
Min. delay from falling edge of SCK (last bit of byte into data
buffer) to falling edge of RDY
20
 
 
ns
Thigh
Min. duration of a SEN high pulse
(Fphd is the phase detector frequency)
1/Fphd
 
 
 
 
Time from power up to first falling edge of SEN
 
 
3.5
ms
Table 2. Timing Specification for the 3-wire Programming Interface.
 
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