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參數(shù)資料
| 型號： | MIC74YQSTR |
| 廠商： | MICREL INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8 I/O, PIA-GENERAL PURPOSE, PDSO16 |
| 封裝： | LEAD FREE, QSOP-16 |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 255K |
| 代理商： | MIC74YQSTR |
Micrel, Inc.
MIC74
October 2006
6
M9999-101006
Interrupt Mask Register
INT_MASK
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
IM7
IM6
IM5
IM4
IM3
IM2
IM1
IM0
Power-On Default Value:0000 0000b, 00h
Command_byte addess: 0000 0100b, 04h
Type:
8-bits, read/write
Bit Name: IMn
Function:
Interrupt enable bit for Pn when Pn is
configured as an input
Operation: 1 = enabled
0 = disabled
Notes:
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain out-
puts. They are then referred to as /FS[2:0] and
/SHDN. No interrupts of any kind are
generated by these pins while in Fan Mode.
Data Register
DATA
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
P7
P6
P5
P4
P3
P2
P1
P0
Power-On Default Value: 1111 1111b, FFh
Command_byte addess: 0000 0101b, 05h
Type:
8-bits, read/write
Bit Name: Pn
Function:
Returns the current state of any Pn configured
as an input and the last value written to Pn’s
configured as outputs; Writing the DATA
register sets the output state of any Pn’s
configured as outputs; writes to I/O bits
configured as inputs are ignored
Read Operation: 1 = Pn is high
0 = Pn is low
Write Operation: 1 = Pn is set to one
0 = Pn is cleared
Notes:
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain out-
puts. They are then referred to as /FS[2:0] and
/SHDN. The state of these pins is determined
by the FAN_SPEED register. While in Fan
Mode, D[7:4] of the DATA registers have no
effect.
Fan Speed Register
FAN_SPEED
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Always write as zero
Fan Speed
Power-On Default Value: 0000 0000b, 00h
fan off
Command_byte addess: 0000 0110b, 06h
Type:
8-bits, read/write
Bit Name: D[0] through D[2]
Function:
Determines bit-pattern on FS[2:0]
Operation:
Output State
D[2:0]
Value
/FS[2:0]
/SHDN
Fan Speed
000
111
0
off
001
110
1
speed 1 (slowest)
010
101
1
speed 2
011
100
1
speed 3
100
011
1
speed 4
101
010
1
speed 5
110
001
1
speed 6
111
000
1
speed 7 (fastest)
Fan Speed Settings
Notes:
Any time the fan speed register contains zero,
that is, the fan is shut down, and a non-zero
value is written into the fan speed register, the
/FS[2:0] and /SHDN outputs will assume the
highest fan speed state for approximately one
second (tSTART). Following this interval, the
state of the fan speed control outputs will
assume the value indicated by the contents of
FAN_SPEED. This insures that the fan will
start reliably when low speed operation is
desired.
Bit Name: D[3] through D[7]
Function:
Reserved
Operation: Always write as zero
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