t
參數(shù)資料
型號(hào): MIC74BQS
廠商: Micrel Inc
文件頁數(shù): 13/18頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16QSOP
標(biāo)準(zhǔn)包裝: 98
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 管件
Micrel, Inc.
MIC74
October 2006
4
M9999-101006
Symbol
Parameter
Condition
Min
Typ
Max
Units
AC Characteristics
tSTART
Fan Startup Interval
normal operation
0.5
1
3.3
sec
tPULSE
Minimum Pulse-Width
minimum pulse-width on Pn to generate
an interrupt, Note 7
10
ns
t/INT
Interrupt Delay
interrupt delay from state change on Pn to
/ALERT ≤ VOL, Note 7
4
s
t/IR
Delay from Status Read or ARA
Response to /ALERT ≥ VOH
4
s
tHD:STA
Hold Time, Note 7
hold time after repeated start condition,
after this period, the first clock is
generated
4
s
tSU:STA
Setup Time, Note 7
repeated start condition setup time
4.7
s
tSU:STO
Stop Condition Setup Time
Note 7
4
s
tHD:DAT
Data Hold Time
Note 7
500
ns
tSU:DAT
Data Setup Time
Note 7
0
ns
tTIMEOUT
Clock Low Time-Out
Note 4, 7
25
35
ms
tLOW
Clock Low Period
Note 5, 7
4.7
s
tHIGH
Clock High Period
Note 5, 7
4
50
s
tF
Clock/Data Fall Time
Note 6, 7
300
ns
tR
Clock/Data Rise Time
Note 6, 7
1000
ns
tBUF
Bus free time between stop and
Start condition
Note 7
4.7
s
Notes
:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
4. Devices participating in a transfer will timeout when any clock low exceeds the value of tTIMEOUT(min) of 25ms. Devices that have detected a timeout
condition must reset the communication no later than tTIMEOUT(max) of 35ms. The maximum value specified must be adhered to by both a master and a
slave as it incorporates the cumulative stretch limit for both a master (10ms) and a slave (25ms).
5. tHIGH(max) provides a simple guaranteed method for devices to detect bus idle conditions.
6. Rise and fall time is defined as follows: tR = VIL(max) – 0.15V to VIH(min) + 0.15V; tF = 0.9VDD to VIL(max) – 0.15V.
7. Guaranteed by design.
Timing Definitions
DATA
CLK
tR
tF
tHD:STA
tSU:STO
tHD:DAT
tHD:STA
tSU:DAT
tHIGH
tSU:STA
tBUF
tLOW
StoP
S
tart
S
tart
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