參數(shù)資料
型號: MIC7111YM5 TR
廠商: Micrel Inc
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC OPAMP R-R I/O 1.8V SOT23-5
標準包裝: 1
系列: IttyBitty®
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.02 V/µs
增益帶寬積: 25kHz
電流 - 輸入偏壓: 1pA
電壓 - 輸入偏移: 900µV
電流 - 電源: 25µA
電流 - 輸出 / 通道: 200mA
電壓 - 電源,單路/雙路(±): 1.8 V ~ 11 V,±0.9 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SC-74A,SOT-753
供應(yīng)商設(shè)備封裝: SOT-23-5
包裝: 標準包裝
產(chǎn)品目錄頁面: 1111 (CN2011-ZH PDF)
其它名稱: 576-2900-6
Micrel, Inc.
MIC7111
February 11, 2013
9
Revision 2.0
Application Information
Input Common Mode Voltage
The MIC7111 tolerates input overdrive by at least
300mV beyond either rail without producing phase
inversion.
If the absolute maximum input voltage is exceeded, the
input current should be limited to ±5mA maximum to
prevent reducing reliability. A 10k series input resistor,
used as a current limiter, will protect the input structure
from voltages as large as 50V above the supply or below
ground. See Figure 1.
Figure 1. Input Current-Limit Protection
Output Voltage Swing
Sink and source output resistances of the MIC7111
are equal. Maximum output voltage swing is determined
by the load and the approximate output resistance. The
output resistance is presented in Equation 1:
LOAD
DROP
OUT
I
V
R
=
Eq. 1
VDROP is the voltage dropped within the amplifier output
stage. VDROP and ILOAD can be determined from the VO
(output swing) portion of the appropriate electrical
characteristics table. ILOAD is equal to the typical output
high voltage minus V+/2 and divided by RLOAD. For
example, using the DC Electrical Characteristics (5V)
table, the typical output voltage drop using a 2k load
(connected to V+/2) is 0.015V, which produces an ILOAD
of:
1.243mA
2k
Ω
0.015V
2.5V
=
Eq. 2
Then,
12
Ω
12.1
1.243mA
15mV
R
OUT
=
Eq. 3
Driving Capacitive Loads
Driving a capacitive load introduces phase-lag into the
output signal, and this in turn reduces op-amp system
phase margin. The application that is least forgiving of
reduced phase margin is a unity gain amplifier. The
MIC7111 can typically drive a 500pF capacitive load
connected directly to the output when configured as a
unity-gain amplifier.
Using Large-Value Feedback Resistors
A large-value feedback resistor (> 500k
) can reduce the
phase margin of a system. This occurs when the
feedback
resistor
acts
in
conjunction
with
input
capacitance to create phase lag in the feedback signal.
Input capacitance is usually a combination of input circuit
components and other parasitic capacitance, such as
amplifier input capacitance and stray printed circuit board
capacitance.
Figure 2 illustrates a method of compensating phase lag
caused
by
using
a
large-value
feedback
resistor.
Feedback capacitor CFB introduces sufficient phase lead
to overcome the phase lag caused by feedback resistor
RFB and input capacitance CIN. The value of CFB is
determined by first estimating CIN and then applying the
following formula:
RIN × CIN
≤ R
FB × CFB
Eq. 4
Figure 2. Cancelling Feedback Phase Lag
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