
Data sheet
MFT62340A-J
9
Pin Description
No
Name
Logic
Description
26
Gnd
Ground
27
Di7c
CML
Data input No 7, inv.
28
Di7
CML
Data input No 7.
29
Gnd
Ground
30
Di8c
CML
Data input No 8, inv.
31
Di8
CML
Data input No 8.
32
Gnd
Ground
33
Di9c
CML
Data input No 9, inv.
34
Di9c
CML
Data input No 9.
35
Gnd
Ground
36
Di10c
CML
Data input No 10, inv.
37
Di10
CML
Data input No 10.
38
Gnd
Ground
39
Di11c
CML
Data input No 11, inv.
40
Di11
CML
Data input No 11.
41
Gnd
Ground
42
Di12c
CML
Data input No 12, inv.
43
Di12
CML
Data input No 12.
44
Gnd
Ground
45
Not Connected
46
Not Connected
47
TX_R
NMOS
Transmitter Ready after
power-up.
Low = Transmitter not
ready.
High = Transmitter ready.
Open drain with internal
pull-up resistor 10k
.
48
VCC
Positive power supply
49
VCC
Positive power supply
50
Gnd
Ground
No
Name
Logic
Description
1
Gnd
Ground
2VCC
Positive power supply
3VCC
Positive power supply
4
TX_EN1-4
CMOS
Transmitter Enable
channels 1 to 4
High = Transmitter
channels active.
Low = Transmitter
channels turned off.
Internal pull-down resistor
50k
.
5
TX_EN5-8
CMOS
Transmitter Enable
channels 5 to 8.
High = Transmitter
channels active.
Low = Transmitter
channels turned off.
Internal pull-down resistor
50k
.
6
TX_EN9-12
CMOS
Transmitter Enable
channels 9 to 12.
High = Transmitter
channels active.
Low = Transmitter
channels turned off.
Internal pull-down resistor
50k
.
7
Gnd
Ground
8
Di1c
CML
Data input No 1, inv
9
Di1
CML
Data input No 1.
10
Gnd
Ground
11
Di2c
CML
Data input No 2, inv.
12
Di2
CML
Data input No 2.
13
Gnd
Ground
14
Di3c
CML
Data input No 3, inv
15
Di3
CML
Data input No 3.
16
Gnd
Ground
17
Di4c
CML
Data input No 4, inv.
18
Di4
CML
Data input No 4.
19
Gnd
Ground
20
Di5c
CML
Data input No 5, inv.
21
Di5
CML
Data input No 5.
22
Gnd
Ground
23
Di6c
CML
Data input No 6, inv
24
Di6
CML
Data input No 6.
25
Gnd
Ground