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| 型號(hào)： | MF280C51-25R |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 164/313頁(yè) |
| 文件大小： | 4988K |
| 代理商： | MF280C51-25R |
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27
32000D–04/2011
AVR32
3.
Java Extension Module
The AVR32 architecture can optionally support execution of Java bytecodes by including a Java
Extension Module (JEM). This support is included with minimal hardware overhead.
Comparing Java bytecode instructions with native AVR32 instructions, we see that a large part
of the instructions overlap as illustrated in Figure 3-1 on page 27. The idea is thus to reuse the
hardware resources by adding a separate Java instruction decoder and control module that exe-
cutes in Java state. The processor keeps track of its execution state through the status register
and changes execution mode seamlessly.
In a larger runtime system, an operating system keeps track of and dispatches different pro-
cesses. A Java program will typically be one, or several, of these processes.
The Java state is not to be confused with the security modes “system” and “application”, as the
JEM can execute in both modes. When the processor switches instruction decoder and enters
Java state, it does not affect the security level set by the system. A Java program could also be
executed from the different interrupt levels without interfering with the mode settings of the pro-
cessor, although it is not recommended that interrupt routines are written in Java due to latency.
The Java binary instructions are called bytecodes. These bytecodes are one or more bytes long.
A bytecode consists of an opcode and optional arguments. The bytecodes include some instruc-
tions with a high semantic content. In order to reduce the hardware overhead, these instructions
are trapped and executed as small RISC programs. These programs are stored in the program
memory and can be changed by the programmer (part of the Java VM implementation). This
gives full flexibility with regards to future extensions of the Java instruction set. Performance is
ensured through an efficient trapping mechanism and “Java tailored” RISC instructions.
Figure 3-1.
A large part of the instruction set is shared between the AVR RISC and the Java
Virtual Machine. The Java instruction set includes instructions with high semantic
contents while the AVR RISC instruction set complements Java’s set with tradi-
tional hardware near RISC instructions
3.1
The AVR32 Java Virtual Machine
The AVR32 Java Virtual machine consists of two parts, the Java Extension Module in hardware
and the AVR32 specific Java Virtual Machine software, see Figure 3-2 on page 28. Together,
the two modules comply with the Java Virtual Machine specification.
High level instructions
Low level instructions
Java
additions
AVR RISC
additions
Java
AVR
Common
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR83C154DCXXX-20/883R | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| MD80C52XXX-30SHXXX | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40 |
| MR80C32-36SC | 8-BIT, 36 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154TXXX-16P883D | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154XXX-16P883R | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MF283C151C-12 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MF283C151C-16 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MF283C151C-20 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MF283C151C-25 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MF283C151C-30 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
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