參數(shù)資料
型號: MF180C51C-12D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44
文件頁數(shù): 161/170頁
文件大?。?/td> 4133K
代理商: MF180C51C-12D
90
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last transition (0xFE to 0xFF)
compared to the ideal transition (at 1.5 LSB below maximum). Ideal value: 0 LSB
Figure 13-10. Gain Error
Integral Non-linearity (INL): After adjusting for offset and gain error, the INL is the maximum deviation of an
actual transition compared to an ideal transition for any code. Ideal value: 0 LSB.
Figure 13-11. Integral Non-linearity (INL)
Differential Non-linearity (DNL): The maximum deviation of the actual code width (the interval between two
adjacent transitions) from the ideal code width (1 LSB). Ideal value: 0 LSB.
Output Code
VREF Input Voltage
Ideal ADC
Actual ADC
Gain
Error
Output Code
VREF Input Voltage
Ideal ADC
Actual ADC
INL
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