參數(shù)資料
型號: MDS108A
廠商: Zarlink Semiconductor Inc.
英文描述: Unmanaged 9-Port 10/100 Mbps Ethernet Switch
中文描述: 非托管9端口10/100 Mbps以太網(wǎng)交換機
文件頁數(shù): 10/37頁
文件大?。?/td> 308K
代理商: MDS108A
MDS108
Data Sheet
10
Zarlink Semiconductor Inc.
3.1 A Few Examples
No QoS Scheduling Desired At All
. The default setting for the MDS108 is no QoS scheduling at all.
Packets are transmitted using a simple first-in-first-out (FIFO) approach, without the reordering that would
result from prioritization. All destinations use 1 queue only. QoS scheduling can be disabled for the entire
chip using AXSC[5].
No QoS Scheduling Desired for Half-Duplex Ports.
It is possible to disable QoS for half duplex ports in
the MDS108. Indeed, this is the default setting, because it is difficult to assure quality of service for half-
duplex ports, which tend to experience unpredictable delay. All destinations configured as half-duplex use 1
transmission queue only in this setting. QoS scheduling can be disabled for all half-duplex ports using
AXSC[7].
QoS Scheduling for Some Destinations, But Not Others.
The MDS108 does not support this feature. The
three options offered are: (a) all ports are QoS-enabled, (b) no ports are QoS-enabled, and (c) only full-
duplex ports are QoS enabled. Of course, the MDS108 will still exhibit single-queue scheduling at a port if all
packets destined for it are marked with a single transmission priority.
No Flow Control Desired.
It is possible to disable flow control for the entire chip, regardless of the
individual port settings. During congestion, some packets will be lost. This capability is located in AXSC[6].
Flow Control Desired for Some Sources, But
Not Others.
By configuring each port separately using bit 0
in the ECR1Px registers, one may enable flow control for some ports, but not others. Flow control cannot be
globally disabled in AXSC[6] if this function is to be achieved. At a congested destination, an incoming
packet from a flow control enabled source will trigger a flow control message sent back to that source. On
the other hand, an incoming packet from a flow control disabled source may or may not be dropped, as per
WRED, but will never trigger flow control.
Scheduling vs. Dropping.
Using the configuration registers in the MDS108, as in earlier examples, a port
may or may not have flow control enabled, and a port may or may not have QoS scheduling enabled. All four
combinations are permissible parameter settings, and which one is chosen depends on application.
In one common application, suppose voice, critical data and web traffic packets originate from the same set of input
ports, and are destined for the same set of output ports. The MDS108’s enhanced WRR scheduling can
be used to
ensure a delay bound for the voice packets. Furthermore, because we want to guarantee that web traffic
congestion does not block critical data or voice, we must disable flow control and use WRED to intelligently drop
packets.
On the other hand, if the goal were file transfer without any packet dropping, one would enable the MDS108’s flow
control function, which halts incoming traffic when the system is congested. QoS scheduling can be disabled, both
because flow control may make quality of service unpredictable, and because, in any case, delay is not critical in
this application.
3.2 Port-Based Prioritization
Some applications may require an explicit prioritization of packets based upon the port the packet originates from.
Defining specific ports of a switch to be IP Phone ports is a specific example that makes use of MDS108’s ability to
assign default priorities to ports.
The MDS108 can be configured to provide specific priority definitions on up to four ports (ports 0 – 3). These user
defined port priorities override the packet priority markings (VLAN tag or TOS/DS), and the new priority is applied to
all packets that enter the switch from that port. These port priority definitions are configured in the Port Priority
(PTPRI) register. There are two bits for each of the four ports that can support port-based priorities. The EN bit
allows the designer to turn on port priorities for each port, and the P bit allows the designer to select either high (1)
or low (0) transmission priority for all packets that enter the switch through that port.
When port priorities are enabled, the remaining ports will provide QoS based upon the VLAN Tag or TOS DS field
mappings in the configuration registers. Only those ports that have port priorities enabled will override the priority
mappings.
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