
420
7682C–AUTO–04/08
AT90CAN32/64/128
33. Errata
33.1
Errata Summary
33.1.1
AT90CAN128 RevD (Date code ≥ 0107)
CAN transmission after 3-bit intermission
Asynchronous Timer-2 wakes up without interrupt
SPI programming timing
33.1.2
AT90CAN32 RevB (Date code ≥ 0107)
CAN transmission after 3-bit intermission
Asynchronous Timer-2 wakes up without interrupt
SPI programming timing
33.1.3
AT90CAN64 RevA
LPM Instruction versus Protection levels and BOOTSIZE
CAN acknowledge error in 3-sample mode with prescaler =1
CAN transmission after 3-bit intermission
Asynchronous Timer-2 wakes up without interrupt
33.2
Errata Description
5. LPM Instruction versus Protection levels and BOOTSIZE
In AT90CAN64 Product, if the Bootloader and Application protection modes are pro-
grammed at level 3, the LPM instruction does not operate properly in some configuration
cases. It will not load the right constant value. The differents cases versus BOOTSIZE value
and Flash memory areas are detailed in following Tables :
Let’s consider 4 sections in the Flash, described below:
Failing cases :
Problem fix / workaround
If protection level 3 is mandatory, the LPM instruction must be moved outside the failing
sections.
Table 33-1.
Flash memory sections
Memory space A :
Application
Memory space B :
Application
Memory space C :
Application
Memory space D :
Bootloader
Bootsize=4096 Words
0000h-2FFFh
3000h-3FFFh
4000h-6FFFh
7000h-7FFFh
Bootsize=2048 Words
0000h-37FFh
3800h-3FFFh
4000h-77FFh
7800h-7FFFh
Bootsize=1024 Words
0000h-3BFFh
3C00h-3FFFh
4000h-7BFFh
7C00h-7FFFh
Bootsize=512 Words
0000h-3DFFh
3E00h-3FFFh
4000h-7DFFh
7E00h-7FFFh
From memory
space
T o m e m e o r y
space
Bug comment
LPM instruction
D
B
Allowed but should not be valid
LPM instruction
B
D
Allowed but should not be valid
LPM instruction
B
A or C
Not allowed but should be
LPM instruction
A or C
B
Not allowed but should be