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參數(shù)資料
| 型號(hào)： | MD82C83H/B |
| 廠商： | INTERSIL CORP |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | CMOS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 158K |
| 代理商： | MD82C83H/B |
281
TM
March 1997
82C83H
CMOS Octal Latching Inverting Bus Driver
Features
Full 8-Bit Parallel Latching Buffer
Bipolar 8283 Compatible
Three-State Inverting Outputs
Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 25ns Max
Gated Inputs
- Reduce Operating Power
- Eliminate the Need for Pull-Up Resistors
Single 5V Power Supply
Low Power Operation
- ICCSB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Operating Temperature Ranges
- C82C83H . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC
- I82C83H . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
- M82C83H . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Description
The Intersil 82C83H is a high performance CMOS Octal
Latching Buffer manufactured using a self-aligned silicon gate
CMOS process (Scaled SAJI IV). The 82C83H provides an 8-
bit parallel latch/buffer in a 20 lead pin package. The active
high strobe (STB) input allows transparent transfer of data
and latches data on the negative transition of this signal. The
active low output enable (OE) permits simple interface to
microprocessor systems. The 82C83H provides inverted data
at the outputs.
Pinouts
82C83H (PDIP, CERDIP)
TOP VIEW
82C83H (PLCC, CLCC)
TOP VIEW
Ordering Information
PART NO.
PACKAGE
TEMP RANGE
PKG. NO
CP82C83H
20 Ld PDIP
0oC to +70oCE20.3
IP82C83H
-40oC to +85oCE20.3
CS82C83H
20 Ld PLCC
0oC to +70oCN20.35
IS82C83H
-40oC to +85oCN20.35
CD82C83H
20 Ld CERDIP
0oC to +70oCF20.3
ID82C83H
-40oC to +85oCF20.3
MD82C83H/B
0oC to +70oCF20.3
8406702RA
SMD#
-55oC to +125oCF20.3
MR82C83H/B
20 Pad CLCC
-55oC to +125oCJ20.A
84067022A
SMD#
-55oC to +125oCJ20.A
TRUTH TABLE
STB
OE
DI
DO
XH
X
HI-Z
HL
L
H
HL
↓
LX
H = Logic One
L = Logic Zero
X = Don‘t Care
HI-Z = High Impedance
↓
= Negative Transition
= Latched to Value of Last
Data
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
DI0
DI1
DI2
DI3
DI4
DI5
DI7
DI6
OE
GND
VCC
DO1
DO2
DO3
DO0
DO4
DO5
DO6
DO7
STB
PIN NAMES
PIN
DESCRIPTION
DI0 - DI7
Data Input Pins
DO0 - DO7
Data Output Pins
STB
Active High Strobe
OE
Active Low Output Enable
19
3
2
20
1
15
16
17
18
14
9
10
111213
4
5
6
7
8
DI4
DI5
DI6
DI7
DI3
OE
GN
D
ST
B
DO
7
DO
6
DO2
DO3
DO4
DO5
DO1
DI
2
DI
1
DI
0
V
CC
DO
0
FN2971.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
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