參數(shù)資料
型號： MD82C50A-5/B
廠商： INTERSIL CORP
元件分類： 微控制器/微處理器
英文描述： 1 CHANNEL(S), 625K bps, SERIAL COMM CONTROLLER, CDIP40
封裝： CERDIP-40
文件頁數(shù)： 1/22頁
文件大?。?/td> 391K
代理商： MD82C50A-5/B
1
TM
March 1997
82C50A
CMOS Asynchronous
Communications Element
Features
Single Chip UART/BRG
DC to 625K Baud (DC to 10MHz Clock)
Crystal or External Clock Input
On Chip Baud Rate Generator 1 to 65535 Divisor Generates 16X
Clock
Prioritized Interrupt Mode
Fully TTL/CMOS Compatible
Microprocessor Bus Oriented Interface
80C86/80C88 Compatible
Scaled SAJI IV CMOS Process
Low Power - 1mA/MHz Typical
Modem Interface
Line Break Generation and Detection
Loopback and Echo Modes
Doubled Buffered Transmitter and Receiver
Single 5V Supply
Description
The 82C50A Asynchronous Communication Element (ACE) is a high
performance programmable Universal Asynchronous Receiver/Trans-
mitter (UART) and Baud Rate Generator (BRG) on a single chip. Using
Intersil’s advanced Scaled SAJI IV CMOS Process, the ACE will
support data rates from DC to 625K baud (0-10MHz clock).
The ACE’s receiver circuitry converts start, data, stop, and parity bits
into a parallel data word. The transmitter circuitry converts a parallel
data word into serial form and appends the start, parity, and stop bits.
The word length is programmable to 5, 6, 7, or 8 data bits. Stop bit
selection provides a choice of 1,1.5, or 2 stop bits.
The Baud Rate Generator divides the clock by a divisor programmable
from 1 to 216-1 to provide standard RS-232C baud rates when using
any one of three industry standard baud rate crystals (1.8432MHz,
2.4576MHz, or 3.072MHz). A programmable buffered clock output
(BAUDOUT) provides either a buffered oscillator or 16X (16 times the
data rate) baud rate clock for general purpose system use.
To meet the system requirements of a CPU interfacing to an asynchro-
nous channel, the modem control signals RTS, CTS, DSR, DTR, RI,
DCD are provided. Inputs and outputs have been designed with full
TTL/CMOS compatibility in order to facilitate mixed TTL/NMOS/CMOS
Functional Diagram
Ordering Information
PACKAGE
TEMPERATURE
RANGE (oC)
625K BAUD
PKG.
NO.
PDIP
0 to +70
CP82C50A-5
E40.6
-40 to +85
IP82C50A-5
E40.6
PLCC
0 to +70
CS82C50A-5
N44.65
-40 to +85
IS82C50A-5
N44.65
CERDIP
0 to +70
CD82C50A-5
F40.6
-40 to +85
ID82C50A-5
F40.6
-55 to +125
MD82C50A-5/B
F40.6
Ordering Information
PACKAGE
TEMPERATURE
RANGE (oC)
625K BAUD
PKG.
NO.
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
A0
A1
A2
MR
DISTR
DOSTR
28
27
26
35
22
21
19
18
CSO
CS1
CS2
12
13
14
ADS
25
MICROPROCESSOR INTERFACE
INTERRUPT
ENABLE,
ID, & CONTROL
30
INTRPT
23
DDIS
24
CSOUT
10
SIN
UART
MODEM
DIVISOR LATCH
AND BAUD RATE
GENERATOR
MODEM CONTROL
MODEM STATUS
RECEIVER
TRANSMITTER
9
RCLK
16
XTAL1
15 BAUDOUT
17
XTAL2
11
SOUT
32
RTS
33
DTR
34
OUT1
31
OUT2
36
CTS
37
DSR
38
DCD
39
RI
LINE STATUS
AND CONTROL
FN2958.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
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