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參數(shù)資料
| 型號： | MD80C52XXX-12SHXXX:D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁數(shù)： | 26/46頁 |
| 文件大?。?/td> | 7004K |
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3
42023G–SAM–03/2014
ATSAM4L8/L4/L2
1.
Description
Atmel's SAM4L series is a member of a family of Flash microcontrollers based on the high per-
formance 32-bit ARM Cortex-M4 RISC processor running at frequencies up to 48MHz.
The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt con-
troller for supporting modern and real-time operating systems.
The ATSAM4L8/L4/L2 embeds state-of-the-art picoPower technology for ultra-low power con-
sumption. Combined power control techniques are used to bring active current consumption
down to 90A/MHz. The device allows a wide range of options between functionality and power
consumption, giving the user the ability to reach the lowest possible power consumption with the
feature set required for the application. On-chip regulator improves power efficiency when used
in swichting mode with an external inductor or can be used in linear mode if application is noise
sensitive.
The ATSAM4L8/L4/L2 supports 4 power saving strategies. The SLEEP mode put the CPU in
idle mode and offers different sub-modes which automatically switch off/on bus clocks, PLL,
oscillators. The WAIT and RETENTION modes provide full logic and RAM retention, associated
with fast wake-up capability (<1.5s) and a very low consumption of, respectively, 3 A and 1.5
A. In addition, WAIT mode supports SleepWalking features. In BACKUP mode, CPU, peripher-
als and RAM are powered off and, while consuming less than 0.5A, the device is able to wake-
up from external interrupts.
The ATSAM4L8/L4/L2 incorporates on-chip Flash tightly coupled to a low power cache
(LPCACHE) for active consumption optimization and SRAM memories for fast access.
The LCD controller is intended for monochrome passive liquid crystal display (LCD) with up to 4
Common terminals and up to 40 Segments terminals. Dedicated Low Power Waveform, Con-
trast Control, Extended Interrupt Mode, Selectable Frame Frequency and Blink functionality are
supported to offload the CPU, reduce interrupts and reduce power consumption. The controller
includes integrated LCD buffers and integrated power supply voltage.
The low-power and high performance capacitive touch module (CATB) is introduced to meet the
demand for a low power capacitive touch solution that could be used to handle buttons, sliders
and wheels. The CATB provides excellent signal performance, as well as autonomous touch
and proximity detection for up to 32 sensors. This solution includes an advanced sequencer in
addition to an hardware filtering unit.
The Advanced Encryption Standard module (AESA) is compliant with the FIPS (Federal Infor-
mation Processing Standard) Publication 197, Advanced Encryption Standard (AES), which
specifies a symmetric block cipher that is used to encrypt and decrypt electronic data. Encryp-
tion is the transformation of a usable message, called the plaintext, into an unreadable form,
called the ciphertext. On the other hand, decryption is the transformation that recovers the plain-
text from the ciphertext. AESA supports 128 bits cryptographic key sizes.
The Peripheral Direct Memory Access (DMA) controller enables data transfers between periph-
erals and memories without processor involvement. The Peripheral DMA controller drastically
reduces processing overhead when transferring continuous and large data streams.
The Peripheral Event System (PES) allows peripherals to receive, react to, and send peripheral
events without CPU intervention. Asynchronous interrupts allow advanced peripheral operation
in low power modes.
The Power Manager (PM) improves design flexibility and security. The Power Manager supports
SleepWalking functionality, by which a module can be selectively activated based on peripheral
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相關(guān)代理商/技術(shù)參數(shù) |
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