
94
ATmega8A [DATASHEET]
8159E–AVR–02/2013
Bit 3 – FOC1A: Force Output Compare for channel A
Bit 2 – FOC1B: Force Output Compare for channel B
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode. However, for ensur-
ing compatibility with future devices, these bits must be set to zero when TCCR1A is written when operating in a
PWM mode. When writing a logical one to the FOC1A/FOC1B bit, an immediate Compare Match is forced on the
waveform generation unit. The OC1A/OC1B output is changed according to its COM1x1:0 bits setting. Note that
the FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the COM1x1:0 bits that
determine the effect of the forced compare.
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer on Compare Match
(CTC) mode using OCR1A as TOP.
The FOC1A/FOC1B bits are always read as zero.
Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting sequence of the
counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, see
Table 17-5. Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on
Compare Match (CTC) mode, and three types of Pulse Width Modulation (PWM) modes. (
See “Modes of Opera-Note:
1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the
WGM12:0 definitions. However, the functionality and
location of these bits are compatible with previous versions of the timer.
Table 17-5.
Waveform Generation Mode Bit Description
Mode
WGM13
WGM12
(CTC1)
WGM11
(PWM11)
WGM10
(PWM10)
Timer/Counter Mode of
TOP
Update of
OCR1
x
TOV1 Flag
Set on
0
Normal
0xFFFF
Immediate
MAX
1
0
1
PWM, Phase Correct, 8-bit
0x00FF
TOP
BOTTOM
2
0
1
0
PWM, Phase Correct, 9-bit
0x01FF
TOP
BOTTOM
3
0
1
PWM, Phase Correct, 10-bit
0x03FF
TOP
BOTTOM
4
0
1
0
CTC
OCR1A
Immediate
MAX
5
0
1
0
1
Fast PWM, 8-bit
0x00FF
BOTTOM
TOP
6
0
1
0
Fast PWM, 9-bit
0x01FF
BOTTOM
TOP
7
0
1
Fast PWM, 10-bit
0x03FF
BOTTOM
TOP
8
1
0
PWM, Phase and Frequency Correct
ICR1
BOTTOM
9
1
0
1
PWM, Phase and Frequency Correct
OCR1A
BOTTOM
10
1
0
1
0
PWM, Phase Correct
ICR1
TOP
BOTTOM
11
1
0
1
PWM, Phase Correct
OCR1A
TOP
BOTTOM
12
1
0
CTC
ICR1
Immediate
MAX
13
1
0
1
(Reserved)
–
14
1
0
Fast PWM
ICR1
BOTTOM
TOP
15
1
Fast PWM
OCR1A
BOTTOM
TOP