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參數(shù)資料
| 型號(hào)： | MCZ33390EFR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 15/15頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX SERIAL LINK 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | J-1850 |
| 電源電壓： | 9 V ~ 16 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
33390
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33390 is a serial transceiver device designed to meet
the SAE Standard J-1850 Class B performance for bi-
directional half-duplex communication. The device is
packaged in an economical surface-mount SOIC plastic
package. An internal block diagram of the device is shown in
The 33390 derives its robustness to temperature and
voltage extremes from being built on a SMARTMOS process,
incorporating CMOS logic, bipolar/MOS analog circuitry, and
DMOS power FETs. Though the 33390 was principally
designed for automotive applications requiring SAE J-1850
Class B standards, it is suited for other serial communication
applications. It is parametrically specified over an ambient
temperature range of -40
°C ≤ T
A ≤ 125°C and 7.0 V ≤ VBAT ≤
16 V supply. The economical 8-pin SOICN surface mount
plastic package makes the device a cost-effective solution.
FUNCTIONAL PIN DESCRIPTION
Input Power (VBAT)
This is the only required input power source necessary to
operate the 33390. The internal voltage reference of the
33390 will remain fully operational with a minimum of 9.0 V
on this pin. Bus transmissions can continue with battery
voltages down to 5.0 V. The bus output voltage will follow the
battery voltage down and, in doing so, track approximately
1.6 V below the battery voltage. The device will continue to
receive and transmit bus data to the microcontroller with
battery voltages as low as 4.25 V. The pin can withstand
voltages from -0.3 V to 40 V. If reverse battery protection is
required, an appropriate diode must be placed in series with
this pin to protect the IC.
Sleep Input (SLEEP)
This input is used to enable and disable the Class B
transmitter. The Class B receiver is always enabled so long
as adequate VBAT pin voltage is applied. When the SLEEP pin
voltage is 5.0 V, the Class B transmitter is enabled. If this
input is 0 V, the Class B transmitter will be disabled and less
than 65 A of current will be drawn by the VBAT pin. The pin
also provides a 5.0 V reference, internal to the device, used
to establish the Rx output level and slew rate times.
Class B Functional Description
The transmitter provides an analog waveshaped 0 V to
7.0 V waveform on the BUS output. It also receives
waveforms and transmits a digital level signal back to a logic
IC. The transmitter can drive up to 32 secondary Class B
transceivers (see Figures 10 and 11). These secondary
nodes may be at ground potentials that are ± 2.0 V relative to
the control assembly. Waveshaping will only be maintained
during 2 of the 4 corners when the 0 to ±2.0 V ground
potential difference condition exists. The 33390 is a
secondary node on the Class B bus. Each secondary
transceiver has a 470 ±10% pF capacitor on its output for
EMI suppression purposes, as well as a 10.6 k
±5% pull-
down resistor to ground. The primary node has a 3300 ±10%
pF capacitor on its output for EMI suppression, as well as a
1.5 k
±5% pull-down resistor to ground. With more than 26
nodes, there is no primary node (see Figure 12). All nodes
will have a 470 ±10% pF capacitor and a 10.6 k
±5% pull-
down resistor. No matter how many secondary nodes are on
the Class B bus, the RC time constant of the Class B bus is
maintained at approximately 5.0 s. The minimum and
maximum capacitance and resistance on the Class B bus is
Figure 10. Minimum Bus Load
Figure 11. Maximum Number of Nodes
Figure 12. Maximum Bus Load
3300 pF
1.5 k
470 pF
10.6 k
One Primary Node
1.5 k
470 pF
10.6 k
Primary Node
442
24 Secondary Nodes
3300 pF
11280 pF
14570 pF
342
470 pF
10.6 k
31 Secondary Nodes
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