
2011 Microchip Technology Inc.
Preliminary
DS70671A-page 17
MCW1001A
2.5
GPIO PINS
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than VDD input levels.
2.5.1
INPUT PINS AND VOLTAGE
CONSIDERATIONS
The voltage tolerance of the GPIO pins varies across
the bank of pins. Some of the pins when used as digital
only inputs can handle DC voltages up to 5.5V, a level
typical for digital logic circuits.
Table summarizes the
input voltage capabilities of the I/O pins. For more infor-
VDD on these pins should be avoided.
TABLE 2-1:
INPUT VOLTAGE LEVELS
2.5.2
PIN OUTPUT DRIVE
The GPIO output pin drive strength varies across the
GPIO bank of pins to meet the needs of a variety of
applications. There are two classes of output pins in
terms of drive capability.
GPIO<5:7> – Designed to drive higher current
loads, such as LED's.
GPIO<0:4> – Designed for small loads, typically
indication only.
Table 2-2 summarizes the output
capabilities. For more information, refer to the
TABLE 2-2:
OUTPUT DRIVE LEVELS
:
2.5.3
INTERFACING TO A +5V SYSTEM
Though the VDDMAX of the MCW1001A is 3.6V, this
device is still capable of interfacing with 5V systems,
even if the VIH of the target system is above 3.6V. This
is accomplished by adding a pull-up resistor to the
GPIO pin, see
Figure 2-2. To produce a high output, the
GPIO pin must be configured as an input, and to
produce a low output, the GPIO pin must be configured
as an output and set low. Only GPIO pins that are
tolerant of voltages up to 5.5V can be used for this type
of interface.
FIGURE 2-2:
+5V SYSTEM HARDWARE
INTERFACE
Pin
Tolerated
Input
Description
GPIO<0:4>
VDD
Only VDD input levels are
tolerated.
GPIO<5:7>
5.5V
Tolerates input levels above
VDD and useful for most
standard logic.
Pin
Drive
Description
GPIO<0:4> Medium Intended for indication.
GPIO<5:7>
High
Suitable for direct LED drive
levels.
GPIO1
+5V Device
+5V
MCW1001A