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參數(shù)資料
| 型號： | MCV14AT-I/SL |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| 封裝： | 3.90 MM, PLASTIC, SOIC-14 |
| 文件頁數(shù)： | 18/82頁 |
| 文件大小： | 1053K |
| 代理商： | MCV14AT-I/SL |
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2009 Microchip Technology Inc.
Preliminary
DS41338C-page 25
MCV14A
5.0
I/O PORT
As with any other register, the I/O register(s) can be
written and read under program control. However, read
instructions (e.g., MOVF PORTB,W) always read the I/O
pins independent of the pin’s Input/Output modes. On
Reset, all I/O ports are defined as input (inputs are at high-
impedance) since the I/O control registers are all set.
5.1
PORTB
PORTB is a 6-bit I/O register. Only the low-order 6 bits
are used (RB<5:0>). Bits 7 and 6 are unimplemented
and read as ‘0’s. Please note that RB3 is an input only
pin. The Configuration Word can set several I/O’s to
alternate functions. When acting as alternate functions,
the pins will read as ‘0’ during a port read. Pins RB0,
RB1, RB3 and RB4 can be configured with weak pull-
ups and also for wake-up on change. The wake-up on
change and weak pull-up functions are not pin select-
able. If RB3/MCLR is configured as MCLR, weak pull-
up is always on and wake-up on change for this pin is
not enabled.
5.2
PORTC
PORTC is a 6-bit I/O register. Only the low-order 6 bits
are used (RC<5:0>). Bits 7 and 6 are unimplemented
and read as ‘0’s.
5.3
TRIS Register
The Output Driver Control register is loaded with the
contents of the W register by executing the TRIS f
instruction. A ‘1’ from a TRIS register bit puts the corre-
sponding output driver in a High-Impedance mode. A
‘0’ puts the contents of the output data latch on the
selected pins, enabling the output buffer. The excep-
tions are RB3, which is input only and the T0CKI pin,
which may be controlled by the OPTION register. See
Register 3-2 and Register 3-3.
The TRIS register is “write-only” and is set (output
drivers disabled) upon Reset.
TABLE 5-1:
WEAK PULL-UP ENABLED PINS
Device
RB0 Weak Pull-up
RB1 Weak Pull-up RB3 Weak Pull-up(1)
RB4 Weak Pull-up
MCV14A
Yes
Note 1: When MCLREN = 1, the weak pull-up on RB3/MCLR is always enabled.
REGISTER 5-1:
PORTB: PORTB REGISTER
U-0
R/W-x
—
RB5
RB4
RB3
RB2
RB1
RB0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘1’
bit 5-0
RB<5:0>: PORTB I/O Pin bits
1
= Port pin is >VIH min.
0
= Port pin is <VIL max.
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