參數(shù)資料
型號： MCP6H04T-E/SL
廠商： Microchip Technology
文件頁數(shù)： 9/46頁
文件大?。?/td> 0K
描述： IC OPAMP QUAD16V 1.2MHZ 14SOIC
標(biāo)準(zhǔn)包裝： 2,600
放大器類型： 通用
電路數(shù)： 4
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 0.8 V/µs
增益帶寬積： 1.2MHz
電流 - 輸入偏壓： 10pA
電壓 - 輸入偏移： 700µV
電流 - 電源： 135µA
電流 - 輸出 / 通道： 50mA
電壓 - 電源，單路/雙路(±)： 3.5 V ~ 16 V，±1.75 V ~ 8 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 14-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 14-SOICN
包裝： 帶卷 (TR)
2010-2011 Microchip Technology Inc.
DS22243D-page 17
MCP6H01/2/4
4.0
APPLICATION INFORMATION
The MCP6H01/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high-precision
applications.
4.1
Inputs
4.1.1
PHASE REVERSAL
The MCP6H01/2/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages.
shows
the
input
voltage
exceeding the supply voltage without any phase
reversal.
4.1.2
INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors against many (but not all)
over-voltage conditions, and to minimize the input bias
current (IB).
FIGURE 4-1:
Simplified Analog Input ESD
Structures.
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD. Their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
overvoltage (beyond VDD) events. Very fast ESD
events (that meet the specification) are limited so that
damage does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
FIGURE 4-2:
Protecting the Analog
Inputs.
A significant amount of current can flow out of the
inputs when the common mode voltage (VCM) is below
ground (VSS), see Figure 2-38.
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
VDD or VSS.
FIGURE 4-3:
Protecting the Analog
Inputs.
4.1.4
NORMAL OPERATION
The inputs of the MCP6H01/2/4 op amps connect to a
differential PMOS input stage. It operates at a low
common mode input voltage (VCM), including ground.
With this topology, the device operates with a VCM up
to VDD – 2.3V and 0.3V below VSS (refer to Figure 2-3
through 2-5). The input offset voltage is measured at
VCM =VSS – 0.3V and VDD – 2.3V to ensure proper
operation.
Bond
Pad
Bond
Pad
Bond
Pad
VDD
VIN+
VSS
Input
Stage
Bond
Pad
VIN–
V1
VDD
D1
V2
D2
MCP6H0X
VOUT
V1
R1
VDD
D1
R1 >
VSS – (minimum expected V1)
2mA
R2 >
VSS – (minimum expected V2)
2mA
V2
R2
D2
R3
V
OUT
MCP6H0X
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