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參數(shù)資料
型號: MCP654-E/SL
廠商: Microchip Technology
文件頁數(shù): 23/66頁
文件大?。?/td> 0K
描述: IC OP AMP 50MHZ 14 SOIC
標(biāo)準(zhǔn)包裝: 57
系列: mCal 技術(shù)
放大器類型: 通用
電路數(shù): 4
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 30 V/µs
增益帶寬積: 50MHz
電流 - 輸入偏壓: 6pA
電壓 - 輸入偏移: 200µV
電流 - 電源: 6mA
電流 - 輸出 / 通道: 150mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 管件
2009-2011 Microchip Technology Inc.
DS22146C-page 3
MCP651/1S/2/3/4/5/9
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings
VDD –VSS .......................................................................6.5V
Current at Input Pins ....................................................±2 mA
Analog Inputs (VIN+ and VIN–) . VSS – 1.0V to VDD +1.0V
All other Inputs and Outputs .......... VSS – 0.3V to VDD +0.3V
Difference Input voltage ...................................... |VDD –VSS|
Output Short Circuit Current ................................ Continuous
Current at Output and Supply Pins ..........................±150 mA
Storage Temperature ...................................-65°C to +150°C
Max. Junction Temperature ........................................ +150°C
ESD protection on all pins (HBM, MM)
1 kV, 200V
Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND, VCM = VDD/3,
VOUT VDD/2, VL = VDD/2, RL = 1 k to VL and CAL/CS =VSS (refer to Figure 1-2).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage
VOS
-200
+200
V
After calibration (Note 1)
Input Offset Voltage Trim Step
VOSTRM
37
200
V
Input Offset Voltage Drift
VOS/TA
—±2.5
V/°C TA= -40°C to +125°C
Power Supply Rejection Ratio
PSRR
61
76
dB
Input Current and Impedance
Input Bias Current
IB
—6
pA
Across Temperature
IB
130
pA
TA= +85°C
Across Temperature
IB
1700
5,000
pA
TA= +125°C
Input Offset Current
IOS
—±1
pA
Common Mode Input Impedance
ZCM
—1013||9
||pF
Differential Input Impedance
ZDIFF
—1013||2
||pF
Common Mode
Common Mode Input Voltage Range
VCMR
VSS 0.3
VDD 1.3
V
Common Mode Rejection Ratio
CMRR
65
81
dB
VDD = 2.5V, VCM = -0.3 to 1.2V
CMRR
68
84
dB
VDD = 5.5V, VCM = -0.3 to 4.2V
Open-Loop Gain
DC Open-Loop Gain (large signal)
AOL
88
114
dB
VDD = 2.5V, VOUT = 0.3V to 2.2V
AOL
94
123
dB
VDD = 5.5V, VOUT = 0.3V to 5.2V
Output
Maximum Output Voltage Swing
VOL, VOH
VSS +25
VDD 25
mV
VDD = 2.5V, G = +2,
0.5V Input Overdrive
VOL, VOH
VSS +50
VDD 50
mV
VDD = 5.5V, G = +2,
0.5V Input Overdrive
Output Short Circuit Current
ISC
±50
±95
±145
mA
VDD = 2.5V (Note 3)
ISC
±50
±100
±150
mA
VDD = 5.5V (Note 3)
Note 1:
Describes the offset (under the specified conditions) right after power-up, or just after the CAL/CS pin is toggled. Thus,
1/f noise effects (an apparent wander in VOS; see Figure 2-35) are not included.
2:
See Figure 2-6 and Figure 2-7 for temperature effects.
3:
The ISC specifications are for design guidance only; they are not tested.
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