參數(shù)資料
型號: MCP6241U
廠商: Microchip Technology Inc.
英文描述: 50 uA, 550 kHz Rail-to-Rail Op Amp
中文描述: 50微安,550千赫軌至軌運算放大器
文件頁數(shù): 8/28頁
文件大小: 378K
代理商: MCP6241U
MCP6241/2/4
DS21882C-page 8
2005 Microchip Technology Inc.
4.0
APPLICATION INFORMATION
The MCP6241/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power and general-
purpose applications. The low supply voltage, low
quiescent current and wide bandwidth makes the
MCP6241/2/4 ideal for battery-powered applications.
4.1
Rail-to-Rail Inputs
The MCP6241/2/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 4-1 shows the input voltage exceeding
the supply voltage without any phase reversal.
FIGURE 4-1:
Phase Reversal.
The MCP6241/2/4 Show No
The input stage of the MCP6241/2/4 op amps use two
differential input stages in parallel. One operates at low
common mode input voltage (V
CM
) and the other at
high V
CM
. With this topology, the device operates with
V
CM
up to 300 mV above V
DD
and 300 mV below V
SS
.
The
Input
Offset
Voltage
V
CM
= V
SS
– 300 mV and V
DD
+ 300 mV to ensure
proper operation.
Input voltages that exceed the input voltage range
(V
SS
– 0.3V to V
DD
+ 0.3V at 25°C) can cause
excessive current to flow into or out of the input pins.
Current beyond ±2 mA can cause reliability problems.
Applications that exceed this rating must be externally
limited with a resistor, as shown in Figure 4-2.
is
measured
at
FIGURE 4-2:
Resistor (R
IN
).
Input Current-Limiting
4.2
Rail-to-Rail Output
The output voltage range of the MCP6241/2/4 op amps
is V
DD
– 35 mV (max.) and V
SS
+ 35 mV (min.) when
R
L
= 10 k
Ω
is connected to V
DD
/2 and V
DD
= 5.5V.
Refer to Figure 2-14 for more information.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage-feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, but all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 70 pF when G = +1), a small series
resistor at the output (R
ISO
in Figure 4-3) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-3:
stabilizes large capacitive loads.
Output resistor, R
ISO
Figure 4-4 gives recommended R
ISO
values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
L
/G
N
), where G
N
is the
circuit’s noise gain. For non-inverting gains, G
N
and the
signal gain are equal. For inverting gains, G
N
is
1 + |Signal Gain| (e.g., –1 V/V gives G
N
= +2 V/V).
-1
0
1
2
3
4
5
6
Time (1 ms/div)
I
V
OUT
V
IN
V
DD
= 5.0V
G = +2 V/V
R
IN
V
---------–
Minimum expected V
2 mA
)
R
IN
Maximum expected V
------------------------------------------------------------------------------
(
)
V
2 mA
V
IN
R
IN
V
OUT
MCP624X
+
V
IN
R
ISO
V
OUT
MCP624X
+
C
L
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