2007 Microchip Technology Inc.
DS21314G-page 9
MCP601/1R/2/3/4
Note: Unless otherwise indicated, T
A = +25°C, VDD = +2.7V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL, CL = 50 pF and CS is tied low.
FIGURE 2-25:
Large Signal Non-Inverting
Pulse Response.
FIGURE 2-26:
Small Signal Non-Inverting
Pulse Response.
FIGURE 2-27:
Chip Select Timing
(MCP603).
FIGURE 2-28:
Large Signal Inverting Pulse
Response.
FIGURE 2-29:
Small Signal Inverting Pulse
Response.
FIGURE 2-30:
Quiescent Current Through
VSS vs. Chip Select Voltage (MCP603).
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Time (1 s/div)
Output
V
o
lta
g
e(V)
VDD = 5.0V
G = +1
Time (1 s/div)
Output
V
o
lta
g
e(20
mV/div
)
VDD = 5.0V
G = +1
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Time (5 s/div)
Out
put
Voltage,
Chip
S
e
le
ct
Voltage
(V
)
VDD = 5.0V
G = +1
VIN = 2.5V
RL = 100 k to GND
CS
VOUT Active
VOUT High-Z
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Time (1 s/div)
O
u
tput
V
o
lt
age
(V)
VDD = 5.0V
G = –1
Time (1 s/div)
Output
V
o
lta
g
e(20
mV/div
)
VDD = 5.0V
G = –1
-800
-700
-600
-500
-400
-300
-200
-100
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Chip Select Voltage (V)
Q
u
ie
sc
ent
Cur
re
nt
through
V
SS
(A)
VDD = 5.5V