MCP6001/1R/1U/2/4
DS21733J-page 16
2009 Microchip Technology Inc.
4.7.3
PEAK DETECTOR
The MCP6001/2/4 op amp has a high input impedance,
rail-to-rail input/output and low input bias current, which
makes
this
device
suitable
for
peak
detector
applications.
Figure 4-9 shows a peak detector circuit
with clear and sample switches. The peak-detection
At the rising edge of CLK, Sample Switch closes to
begin sampling. The peak voltage stored on C1 is
sampled to C2 for a sample time defined by tSAMP. At
the end of the sample time (falling edge of Sample
Signal), Clear Signal goes high and closes the Clear
Switch. When the Clear Switch closes, C1 discharges
through R1 for a time defined by tCLEAR. At the end of
the clear time (falling edge of Clear Signal), op amp A
begins to store the peak value of VIN on C1 for a time
defined by tDETECT.
In order to define tSAMP and tCLEAR, it is necessary to
determine the capacitor charging and discharging
period. The capacitor charging time is limited by the
amplifier source current, while the discharging time (
τ)
is defined using R1 (τ = R1C1). tDETECT is the time that
the input signal is sampled on C1 and is dependent on
the input voltage change frequency.
The op amp output current limit, and the size of the
storage capacitors (both C1 and C2), could create
slewing limitations as the input voltage (VIN) increases.
Current through a capacitor is dependent on the size of
the capacitor and the rate of voltage change. From this
relationship, the rate of voltage change or the slew rate
can be determined. For example, with an op amp short
circuit current of ISC = 25 mA and a load capacitor of
C1 = 0.1 F, then:
EQUATION 4-1:
This voltage rate of change is less than the MCP6001/2/4
slew rate of 0.6 V/s. When the input voltage swings
below the voltage across C1, D1 becomes reverse-
biased. This opens the feedback loop and rails the
amplifier. When the input voltage increases, the amplifier
recovers at its slew rate. Based on the rate of voltage
change shown in the above equation, it takes an
extended period of time to charge a 0.1 F capacitor. The
capacitors need to be selected so that the circuit is not
limited by the amplifier slew rate. Therefore, the
capacitors should be less than 40 F and a stabilizing
resistor (RISO) needs to be properly selected. (Refer to
FIGURE 4-9:
Peak Detector with Clear and Sample CMOS Analog Switches.
dV
C1
dt
-------------
I
SC
C
1
--------
=
25mA
0.1
μF
---------------
=
dV
C1
dt
-------------
250mV
μs
=
I
SC
C
1
dV
C1
dt
-------------
=
VIN
MCP6002
VC1
MCP6002
D1
Op Amp A
Op Amp B
VOUT
MCP6001
Op Amp C
C2
Sample Signal
Clear Signal
Clear
RISO
Sample
–
+
–
+
–
+
CLK
tSAMP
tCLEAR
tDETECT
Switch
1/2
R1
RISO VC2
C1