參數(shù)資料
型號(hào): MCP4542T-103E/MS
廠商: Microchip Technology
文件頁(yè)數(shù): 3/92頁(yè)
文件大?。?/td> 0K
描述: IC POT DGTL 10K SGL 8-MSOP
標(biāo)準(zhǔn)包裝: 2,500
接片: 129
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 150 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
2008 Microchip Technology Inc.
DS22107A-page 11
MCP454X/456X/464X/466X
Digital Inputs/Outputs (SDA, SCK, HVC/A0, A1, A2, WP)
Schmitt Trigger
High Input
Threshold
VIH
0.45 VDD
——
V
All
Inputs
except
SDA
and
SCL
2.7V
≤ V
DD ≤ 5.5V
(Allows 2.7V Digital VDD with
5V Analog VDD)
0.5 VDD
——
V
1.8V
≤ V
DD ≤ 2.7V
0.7 VDD
—VMAX
V
SDA
and
SCL
100 kHz
0.7 VDD
—VMAX
V400 kHz
0.7 VDD
—VMAX
V1.7 MHz
0.7 VDD
—VMAX
V3.4 Mhz
Schmitt Trigger
Low Input
Threshold
VIL
0.2VDD
V
All inputs except SDA and SCL
-0.5
0.3VDD
V
SDA
and
SCL
100 kHz
-0.5
0.3VDD
V400 kHz
-0.5
0.3VDD
V1.7 MHz
-0.5
0.3VDD
V3.4 Mhz
Hysteresis of
Schmitt Trigger
Inputs (Note 6)
VHYS
—0.1VDD
V
All inputs except SDA and SCL
N.A.
V
SDA
and
SCL
100 kHz
VDD < 2.0V
N.A.
V
VDD ≥ 2.0V
0.1 VDD
——
V
400 kHz
VDD < 2.0V
0.05 VDD
——
V
VDD ≥ 2.0V
0.1 VDD
——
V
1.7 MHz
0.1 VDD
——
V
3.4 Mhz
High Voltage Input
Entry Voltage
VIHHEN
8.5
12.5 (6)
V
Threshold for WiperLock Technology
High Voltage Input
Exit Voltage
VIHHEX
——
VDD +
0.8V (6)
V
High Voltage Limit
VMAX
——
12.5 (6)
V
Pin can tolerate VMAX or less.
AC/DC CHARACTERISTICS (CONTINUED)
DC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C
≤ T
A ≤ +125°C (extended)
All parameters apply across the specified operating ranges unless noted.
VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices.
Typical specifications represent values for VDD = 5.5V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Note 1:
Resistance is defined as the resistance between terminal A to terminal B.
2:
INL and DNL are measured at VW with VA = VDD and VB = VSS.
3:
MCP4XX1 only.
4:
MCP4XX2 only, includes VWZSE and VWFSE.
5:
Resistor terminals A, W and B’s polarity with respect to each other is not restricted.
6:
This specification by design.
7:
Non-linearity is affected by wiper resistance (RW), which changes significantly overvoltage and
temperature.
8:
The MCP4XX1 is externally connected to match the configurations of the MCP45X2 and MCP46X2, and
then tested.
9:
POR/BOR is not rate dependent.
10: Supply current is independent of current through the resistor network
11: When HVC/A0 = VIHH, the IDD current is less due to current into the HVC/A0 pin. See IPU specification
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