
MCRF450/451/452/455
DS40232H-page 12
2003 Microchip Technology Inc.
3.0
BLOCK DIAGRAM
The device contains four major sections. They are:
Analog Front-End, Detection/Encoding, Read/Write
Anti-collision Logic and Memory sections. Figure 3-1
shows the block diagram of the device.
FIGURE 3-1:
BLOCK DIAGRAM
Time Slot Generator
Clock Generator
To Memory
Modulation
MEMORY SECTION
Memory Array
High/Low Voltage
Power-on Reset
V
DD
READ/WRITE Anti-collision SECTION
Anti-collision Command Controller
Regulator
Demodulator (Detector)
PPM
Command
CRC/Parity Generator and Checker
Data Encoder
Time Slot
Counter
Registers
(High Voltage)
Main Clock
From
High Voltage (HV)
High Voltage
E
To Anti-collision
Command Controller
(
V
DD
)
V
DD
from POR
(POR)
Regulator
ANALOG FRONT-END SECTION
DETECTION/ENCODING
SECTION
Fast Mode
Detuning Circuit
V
DD
Oscillator
(TC, TSMAX, Tag ID)
Decoder
Decoder