參數(shù)資料
型號： MCP4461-104E/ML
廠商： Microchip Technology
文件頁數(shù)： 39/100頁
文件大?。?/td> 0K
描述： IC DGTL POT 257TAPS 100K 20QFN
標準包裝： 91
接片： 257
電阻（歐姆）： 100k
電路數(shù)： 4
溫度系數(shù)： 標準值 150 ppm/°C
存儲器類型： 非易失
接口： I²C（設備位址）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 20-VFQFN 裸露焊盤
供應商設備封裝： 20-QFN 裸露焊盤（4x4）
包裝： 管件
2010 Microchip Technology Inc.
DS22265A-page 43
MCP444X/446X
4.2.1
NONVOLATILE MEMORY
(EEPROM)
This memory can be grouped into two uses of
nonvolatile memory. These are:
The nonvolatile wipers start functioning below the
devices VPOR/VBOR trip point.
4.2.1.1
General Purpose Registers
These locations allow the user to store up to 5 (9-bit)
locations worth of information.
4.2.1.2
Nonvolatile Wiper Registers
These locations contain the wiper values that are
loaded into the corresponding volatile wiper register
whenever the device has a POR/BOR event. There are
four registers, one for each resistor network.
The nonvolatile wiper register enables stand-alone
operation of the device (without Microcontroller control)
after being programmed to the desired value.
4.2.1.3
Factory Initialization of Nonvolatile
Memory (EEPROM)
The Nonvolatile Wiper values will be initialized to
mid-scale value. This is shown in Table 4-2.
The General purpose EEPROM memory will be
programmed to a default value of 0x000.
It is good practice in the manufacturing flow to
configure the device to your desired settings.
TABLE 4-2:
DEFAULT FACTORY
SETTINGS SELECTION
4.2.1.4
Special Features
There are 5 nonvolatile bits that are not directly
mapped into the address space. These bits control the
following functions:
EEPROM Write Protect
WiperLock Technology for Nonvolatile Wiper 0
WiperLock Technology for Nonvolatile Wiper 1
WiperLock Technology for Nonvolatile Wiper 2
WiperLock Technology for Nonvolatile Wiper 3
The operation of WiperLock Technology is discussed in
. The state of the WL0, WL1, WL2, WL3,
and WP bits is reflected in the STATUS register (see
EEPROM Write Protect
All internal EEPROM memory can be Write Protected.
When EEPROM memory is Write Protected, Write
commands to the internal EEPROM are prevented.
Write Protect (WP) can be enabled/disabled by two
methods. These are:
External WP Hardware pin (MCP44X1 devices
only)
Nonvolatile configuration bit (WP)
High Voltage commands are required to enable and
disable the nonvolatile WP bit. These commands are
.
To write to EEPROM, both the external WP pin and the
internal WP EEPROM bit must be disabled. Write
Protect does not block commands to the volatile
registers.
4.2.2
VOLATILE MEMORY (RAM)
There are seven Volatile Memory locations. These are:
Volatile Wiper 0
Volatile Wiper 1
Volatile Wiper 2
Volatile Wiper 3
Status Register
Terminal Control (TCON0) Register 0
Terminal Control (TCON)1 Register 1
The volatile memory starts functioning at the RAM
retention voltage (VRAM).
R
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Defa
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POR
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Wiper
Code
W
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TM
T
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Pr
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Settin
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8-bit 7-bit
-502
5.0 k
Ω
Mid scale 80h
40h
Disabled
-103
10.0 k
Ω Mid scale 80h
40h
Disabled
-503
50.0 k
Ω Mid scale 80h
40h
Disabled
-104
100.0 k
Ω Mid scale 80h
40h
Disabled
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