參數(shù)資料
型號(hào)： MCP4441-502E/ML
廠商： Microchip Technology
文件頁(yè)數(shù)： 35/100頁(yè)
文件大小： 0K
描述： IC DGTL POT 129TAPS QUAD 20QFN
標(biāo)準(zhǔn)包裝： 91
接片： 129
電阻（歐姆）： 5k
電路數(shù)： 4
溫度系數(shù)： 標(biāo)準(zhǔn)值 150 ppm/°C
存儲(chǔ)器類(lèi)型： 非易失
接口： I²C（設(shè)備位址）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 20-QFN 裸露焊盤(pán)（4x4）
包裝： 管件
MCP444X/446X
DS22265A-page 4
2010 Microchip Technology Inc.
AC/DC CHARACTERISTICS
DC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C
≤ TA ≤ +125°C (extended)
All parameters apply across the specified operating ranges unless noted.
VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices.
Typical specifications represent values for VDD = 5.5V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Supply Voltage
VDD
2.7
—
5.5
V
1.8
—
2.7
V
Serial Interface only.
HVC/A0, SDA,
SCL, A1, WP,
RESET pin
Voltage Range
VHV
VSS
—12.5V
V
VDD ≥
4.5V
The HVC/A0 pin will be at one
of three input levels
(VIL, VIH or VIHH). (Note 6)
VSS
—VDD +
8.0V
VVDD <
4.5V
VDD Start Voltage
to ensure Wiper
Reset
VBOR
—
1.65
V
RAM retention voltage (VRAM) < VBOR
VDD Rise Rate to
ensure Power-on
Reset
VDDRR
Delay after device
exits the reset
state
(VDD > VBOR)
TBORD
—10
20
s
Supply Current
IDD
—
600
A
Serial Interface Active,
HVC/A0 = VIH (or VIL) (Note 11)
Write all 0’s to volatile Wiper 0
VDD = 5.5V, FSCL @ 3.4 MHz
—
250
A
Serial Interface Active,
HVC/A0 = VIH (or VIL) (Note 11)
Write all 0’s to volatile Wiper 0
VDD = 5.5V, FSCL @ 100 kHz
—
575
A
EE Write Current (Write Cycle)
(Nonvolatile device only),
VDD = 5.5V, FSCL = 400 kHz,
Write all 0’s to Nonvolatile Wiper 0
SCL = VIL or VIH
—
2.5
5
A
Serial Interface Inactive,
(Stop condition, SCL = SDA = VIH),
Wiper = 0
VDD = 5.5V, HVC/A0 = VIH
Note 1:
Resistance is defined as the resistance between terminal A to terminal B.
2:
INL and DNL are measured at VW with VA = VDD and VB = VSS.
3:
MCP44X1
only.
4:
MCP44X2
only, includes VWZSE and VWFSE.
5:
Resistor terminals A, W and B’s polarity with respect to each other is not restricted.
6:
This specification by design.
7:
Non-linearity is affected by wiper resistance (RW), which changes significantly over voltage and
temperature.
8:
The MCP44X1 is externally connected to match the configurations of the MCP44X2, and then tested.
9:
POR/BOR is not rate dependent.
10:
Supply current is independent of current through the resistor network.
11:
When HVC/A0 = VIHH, the IDD current is less due to current into the HVC/A0 pin. See IPU specification.
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