參數(shù)資料
型號: MCP4362-104E/ST
廠商: Microchip Technology
文件頁數(shù): 26/59頁
文件大?。?/td> 0K
描述: IC DIGITAL POTENTIOMETER 14TSSOP
標準包裝: 96
系列: WiperLock™
接片: 257
電阻(歐姆): 100k
電路數(shù): 4
溫度系數(shù): 標準值 150 ppm/°C
存儲器類型: 非易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
MCP434X/436X
DS22233A-page 32
2009 Microchip Technology Inc.
4.2
Memory Map
The device memory is 16 locations that are 9-bits wide
(16x9 bits). This memory space contains both volatile
and non-volatile locations (see Table 4-1).
TABLE 4-1:
MEMORY MAP AND THE SUPPORTED COMMANDS
Address
Function
Memory
Type
Allowed Commands
Disallowed Commands (2)
Factory
Initialization
00h
Volatile Wiper 0
RAM
Read, Write,
Increment, Decrement
01h
Volatile Wiper 1
RAM
Read, Write,
Increment, Decrement
02h
Non-Volatile Wiper 0
EEPROM
Read, Write (1)
Increment, Decrement
8-bit
80h
7-bit
40h
03h
Non-Volatile Wiper 1
EEPROM
Read, Write (1)
Increment, Decrement
8-bit
80h
7-bit
40h
04h
Volatile
TCON0 Register
RAM
Read, Write
Increment, Decrement
05h
Status Register
RAM
Read
Write, Increment, Decrement
06h
Volatile Wiper 2
RAM
Read, Write,
Increment, Decrement
07h
Volatile Wiper 3
RAM
Read, Write,
Increment, Decrement
08h
Non-Volatile Wiper 2
EEPROM
Read, Write (1)
Increment, Decrement
8-bit
80h
7-bit
40h
09h
Non-Volatile Wiper 3
EEPROM
Read, Write (1)
Increment, Decrement
8-bit
80h
7-bit
40h
0Ah
Volatile
TCON1 Register
RAM
Read, Write
Increment, Decrement
0Bh
Data EEPROM
EEPROM
Read, Write (1)
Increment, Decrement
000h
0Ch
Data EEPROM
EEPROM
Read, Write (1)
Increment, Decrement
000h
0Dh
Data EEPROM
EEPROM
Read, Write (1)
Increment, Decrement
000h
0Eh
Data EEPROM
EEPROM
Read, Write (1)
Increment, Decrement
000h
0Fh
Data EEPROM
EEPROM
Read, Write (1)
Increment, Decrement
000h
Note 1:
When an EEPROM write is active, these are invalid commands and will generate an error condition. The
user should use a read of the Status register to determine when the write cycle has completed. To exit the
error condition, the user must take the CS pin to the VIH level and then back to the active state (VIL or
VIHH).
2:
This command on this address will generate an error condition. To exit the error condition, the user must
take the CS pin to the VIH level and then back to the active state (VIL or VIHH).
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