參數(shù)資料
型號： MCP4262T-502E/UN
廠商： Microchip Technology
文件頁數(shù)： 49/88頁
文件大?。?/td> 0K
描述： IC RHEOSTAT 5K 2CH 10MSOP
標準包裝： 2,500
系列： WiperLock™
接片： 257
電阻（歐姆）： 5k
電路數(shù)： 2
溫度系數(shù)： 標準值 150 ppm/°C
存儲器類型： 非易失
接口： 4 線 SPI（芯片選擇）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 帶卷 (TR)
其它名稱： MCP4262T-502-E/UN
MCP4262T-502-E/UNTR
MCP4262T-502-E/UNTR-ND
MCP4262T-502E/UNTR
2008 Microchip Technology Inc.
DS22059B-page 53
MCP414X/416X/424X/426X
7.7
Increment Wiper
Normal and High Voltage
The Increment Command is an 8-bit command. The
Increment Command can only be issued to volatile
memory locations. The format of the command is
shown in Figure 7-6.
An Increment Command to the volatile memory
location changes that location after a properly
formatted command (8-clocks) have been received.
Increment commands provide a quick and easy
method to modify the value of the volatile wiper location
by +1 with minimal overhead.
FIGURE 7-6:
Increment Command -
SDI and SDO States.
7.7.1
SINGLE INCREMENT
Typically, the CS pin starts at the inactive state (VIH),
but may be already be in the active state due to the
completion of another command.
through
show
possible
waveforms for a single increment. The increment
operation requires that the CS pin be in the active state
(VILor VIHH). Typically, the CS pin will be in the inactive
state (VIH) and is driven to the active state (VILor VIHH).
The 8-bit Increment Command (Command Byte) is
then clocked in on the SDI pin by the SCK pins. The
SDO pin drives the CMDERR bit on the 7th clock.
The wiper value will increment up to 100h on 8-bit
devices and 80h on 7-bit devices. After the wiper value
has reached Full Scale (8-bit =100h, 7-bit =80h), the
wiper value will not be incremented further. If the Wiper
register has a value between 101h and 1FFh, the
Increment command is disabled. See Table 7-4 for
additional information on the Increment Command
versus the current volatile wiper value.
The Increment operations only require the Increment
command byte while the CS pin is active (VILor VIHH)
for a single increment.
After the wiper is incremented to the desired position,
the CS pin should be forced to VIH to ensure that
unexpected transitions on the SCK pin do not cause
the wiper setting to change. Driving the CS pin to VIH
should occur as soon as possible (within device
specifications) after the last desired increment occurs.
TABLE 7-4:
INCREMENT OPERATION VS.
VOLATILE WIPER VALUE
Note:
Table 7-2 shows the valid addresses for
the Increment Wiper command. Other
addresses are invalid.
A
D
3
A
D
2
A
D
1
A
D
0
01
X X
111111 1* 1 Note 1, 2
111111
0
0 Note 1, 3
(INCR COMMAND (n+1) )
SDI
SDO
COMMAND BYTE
Note 1:
Only functions when writing the volatile
wiper registers (AD3:AD0) 0h and 1h.
2:
Valid Address/Command combination.
3:
Invalid Address/Command combination
all following SDO bits will be low until the
CMDERR condition is cleared.
(the CS pin is forced to the inactive
state).
4:
If a Command Error (CMDERR) occurs
at this bit location (*), then all following
SDO bits will be driven low until the CS
pin is driven inactive (VIH).
Current Wiper
Setting
Wiper (W)
Properties
Increment
Command
Operates?
7-bit
Pot
8-bit
Pot
3FFh
081h
3FFh
101h
Reserved
(Full-Scale (W = A))
No
080h
100h
Full-Scale (W = A)
No
07Fh
041h
0FFh
081
W = N
040h
080h
W = N (Mid-Scale)
Yes
03Fh
001h
07Fh
001
W = N
000h
Zero Scale (W = B)
Yes
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