參數(shù)資料
型號(hào): MCP4231-503E/ST
廠(chǎng)商: Microchip Technology
文件頁(yè)數(shù): 51/59頁(yè)
文件大小: 0K
描述: IC DGTL POT DL 50K 2CH 14-TSSOP
標(biāo)準(zhǔn)包裝: 96
接片: 129
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 150 ppm/°C
存儲(chǔ)器類(lèi)型: 易失
接口: 4 線(xiàn) SPI(芯片選擇)
電源電壓: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
其它名稱(chēng): MCP4231-503-E/ST
MCP4231-503-E/ST-ND
Micrel, Inc.
KSZ8051MNL/RNL
July 2010
55
M9999-070910-1.0
Reset Circuit
The following reset circuit is recommended for powering up the KSZ8051MNL/RNL if reset is triggered by the power
supply.
Figure 19. Recommended Reset Circuit
The following reset circuit is recommended for applications where reset is driven by another device (e.g., CPU or FPGA).
At power-on-reset, R, C and D1 provide the necessary ramp rise time to reset the KSZ8051MNL/RNL device. The
RST_OUT_n from CPU/FPGA provides the warm reset after power up.
Figure 20. Recommended Reset Circuit for interfacing with CPU/FPGA Reset Output.
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