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| 型號： | MCP42100-E/SL |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 23/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL 100K 2CH SPI 14SOIC |
| 標準包裝： | 57 |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標準值 800 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線串行（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 管件 |
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MCP41XXX/42XXX
DS11195C-page 4
2003 Microchip Technology Inc.
DC CHARACTERISTICS: 100 k
VERSION
Electrical Characteristics: Unless otherwise indicated, VDD = +2.7V to 5.5V, TA = -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Rheostat Mode
Nominal Resistance
R
70
100
130
k
Rheostat Differential Non-Linearity
R-DNL
-1
±1/4
+1
LSB
Rheostat Integral Non-Linearity
R-INL
-1
±1/4
+1
LSB
Rheostat Tempco
RAB/T
—
800
—
ppm/°C
Wiper Resistance
RW
—
125
175
VDD = 5.5V, IW = 1 mA, code 00h
RW
—
175
250
VDD = 2.7V, IW = 1 mA, code 00h
Wiper Current
IW
-1
—
+1
mA
Nominal Resistance Match
R/R
—
0.2
1
%
MCP42010 only, P0 to P1;TA = +25°C
Potentiometer Divider
Resolution
N
8
—
Bits
Monotonicity
N
8
—
Bits
Differential Non-Linearity
DNL
-1
±1/4
+1
LSB
Integral Non-Linearity
INL
-1
±1/4
+1
LSB
Voltage Divider Tempco
VW/T
—
1
—
ppm/°C Code 80h
Full-Scale Error
VWFSE
-1
-0.25
0
LSB
VWFSE
-1
-0.35
0
LSB
Zero-Scale Error
VWZSE
0
+0.25
+1
LSB
VWZSE
0
+0.35
+1
LSB
Resistor Terminals
Voltage Range
VA,B,W
0—
VDD
Capacitance (CA or CB)
—
11
—
pF
f =1 MHz, Code = 80h, see Figure 2-30
Capacitance
CW
—
5.6
—
pF
f =1 MHz, Code = 80h, see Figure 2-30
Dynamic Characteristics (All dynamic characteristics use VDD = 5V.)
Bandwidth -3dB
BW
—
145
—
MHz
VB = 0V, Measured at Code 80h,
Output Load = 30 PF
Settling Time
tS
—18
—
S
VA = VDD,VB = 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
Resistor Noise Voltage
eNWB
—29
—
nV/
√Hz VA = Open, Code 80h, f =1 kHz
Crosstalk
CT
—-95
—dB
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
Schmitt Trigger High-Level Input Voltage
VIH
0.7VDD
——
V
Schmitt Trigger Low-Level Input Voltage
VIL
—
0.3VDD
V
Hysteresis of Schmitt Trigger Inputs
VHYS
—0.05VDD
—
Low-Level Output Voltage
VOL
—
0.40
V
IOL = 2.1 mA, VDD = 5V
High-Level Output Voltage
VOH
VDD - 0.5
—
V
IOH = -400 A, VDD = 5V
Input Leakage Current
ILI
-1
—
+1
A
CS = VDD, VIN = VSS or VDD, includes VA SHDN=0
Pin Capacitance (All inputs/outputs)
CIN, COUT
—10
—
pF
VDD = 5.0V, TA = +25°C, fc = 1 MHz
Power Requirements
Operating Voltage Range
VDD
2.7
—
5.5
V
Supply Current, Active
IDDA
—
340
500
A
VDD = 5.5V, CS = VSS, fSCK = 10 MHz,
SO = Open, Code FFh (Note 6)
Supply Current, Static
IDDS
—0.01
1
A
Power Supply Sensitivity
PSS
—
0.0015
0.0035
%/%
VDD = 4.5V - 5.5V, VA = 4.5V, Code 80h
PSS
—
0.0015
0.0035
%/%
VDD = 2.7V - 3.3V, VA = 2.7V, Code 80h
Note
1:
VAB = VDD, no connection on wiper.
2:
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = 50 A for
3:
INL and DNL are measured at VW with the device configured in the voltage divider or potentiometer mode. VA = VDD and VB = 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
4:
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
5:
Measured at VW pin where the voltage on the adjacent VW pin is swinging full-scale.
6:
Supply current is independent of current through the potentiometers.
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