- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9349 > MCP4141T-502E/MF (Microchip Technology)IC POT DGTL SNGL 5K SPI 8DFN PDF資料下載
參數(shù)資料
| 型號(hào)： | MCP4141T-502E/MF |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 49/88頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL SNGL 5K SPI 8DFN |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 系列： | WiperLock™ |
| 接片： | 129 |
| 電阻（歐姆）： | 5k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 150 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | 3 線 SPI（芯片選擇） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-DFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)當(dāng)前第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)
2008 Microchip Technology Inc.
DS22059B-page 53
MCP414X/416X/424X/426X
7.7
Increment Wiper
Normal and High Voltage
The Increment Command is an 8-bit command. The
Increment Command can only be issued to volatile
memory locations. The format of the command is
shown in Figure 7-6.
An Increment Command to the volatile memory
location changes that location after a properly
formatted command (8-clocks) have been received.
Increment commands provide a quick and easy
method to modify the value of the volatile wiper location
by +1 with minimal overhead.
FIGURE 7-6:
Increment Command -
SDI and SDO States.
7.7.1
SINGLE INCREMENT
Typically, the CS pin starts at the inactive state (VIH),
but may be already be in the active state due to the
completion of another command.
through
show
possible
waveforms for a single increment. The increment
operation requires that the CS pin be in the active state
(VILor VIHH). Typically, the CS pin will be in the inactive
state (VIH) and is driven to the active state (VILor VIHH).
The 8-bit Increment Command (Command Byte) is
then clocked in on the SDI pin by the SCK pins. The
SDO pin drives the CMDERR bit on the 7th clock.
The wiper value will increment up to 100h on 8-bit
devices and 80h on 7-bit devices. After the wiper value
has reached Full Scale (8-bit =100h, 7-bit =80h), the
wiper value will not be incremented further. If the Wiper
register has a value between 101h and 1FFh, the
Increment command is disabled. See Table 7-4 for
additional information on the Increment Command
versus the current volatile wiper value.
The Increment operations only require the Increment
command byte while the CS pin is active (VILor VIHH)
for a single increment.
After the wiper is incremented to the desired position,
the CS pin should be forced to VIH to ensure that
unexpected transitions on the SCK pin do not cause
the wiper setting to change. Driving the CS pin to VIH
should occur as soon as possible (within device
specifications) after the last desired increment occurs.
TABLE 7-4:
INCREMENT OPERATION VS.
VOLATILE WIPER VALUE
Note:
Table 7-2 shows the valid addresses for
the Increment Wiper command. Other
addresses are invalid.
A
D
3
A
D
2
A
D
1
A
D
0
01
X X
111111 1* 1 Note 1, 2
111111
0
0 Note 1, 3
(INCR COMMAND (n+1) )
SDI
SDO
COMMAND BYTE
Note 1:
Only functions when writing the volatile
wiper registers (AD3:AD0) 0h and 1h.
2:
Valid Address/Command combination.
3:
Invalid Address/Command combination
all following SDO bits will be low until the
CMDERR condition is cleared.
(the CS pin is forced to the inactive
state).
4:
If a Command Error (CMDERR) occurs
at this bit location (*), then all following
SDO bits will be driven low until the CS
pin is driven inactive (VIH).
Current Wiper
Setting
Wiper (W)
Properties
Increment
Command
Operates?
7-bit
Pot
8-bit
Pot
3FFh
081h
3FFh
101h
Reserved
(Full-Scale (W = A))
No
080h
100h
Full-Scale (W = A)
No
07Fh
041h
0FFh
081
W = N
040h
080h
W = N (Mid-Scale)
Yes
03Fh
001h
07Fh
001
W = N
000h
Zero Scale (W = B)
Yes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-2N2-MY-F2 | CONVERTER MOD DC/DC 15V 50W |
| VE-2N2-MY-F1 | CONVERTER MOD DC/DC 15V 50W |
| M83723/76W2219N | CONN PLUG 19POS STRAIGHT W/PINS |
| MCP4141T-502E/SN | IC POT DGTL SNGL 5K SPI 8SOIC |
| MS27505E25B1P | CONN RCPT 128POS BOX MNT W/PINS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP4141T-502I/MF | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/MS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
| MCP4141T-502I/SL | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。