參數(shù)資料
型號： MCP4141T-103E/SN
廠商： Microchip Technology
文件頁數(shù)： 41/88頁
文件大?。?/td> 0K
描述： IC POT DGTL SNGL 10K SPI 8SOIC
標(biāo)準(zhǔn)包裝： 3,300
系列： WiperLock™
接片： 129
電阻（歐姆）： 10k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 150 ppm/°C
存儲器類型： 易失
接口： 3 線 SPI（芯片選擇）
電源電壓： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOICN
包裝： 帶卷 (TR)
MCP414X/416X/424X/426X
DS22059B-page 46
2008 Microchip Technology Inc.
TABLE 7-2:
MEMORY MAP AND THE SUPPORTED COMMANDS
Address
Command
Data
(10-bits) (1)
SPI String (Binary)
Value
Function
MOSI (SDI pin)
MISO (SDO pin) (2)
00h
Volatile Wiper 0
Write Data
nn nnnn nnnn
0000 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0000 11nn nnnn nnnn
1111 111n nnnn nnnn
Increment Wiper
—
0000 0100
1111 1111
Decrement Wiper
—
0000 1000
1111 1111
01h
Volatile Wiper 1
Write Data
nn nnnn nnnn
0001 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0001 11nn nnnn nnnn
1111 111n nnnn nnnn
Increment Wiper
—
0001 0100
1111 1111
Decrement Wiper
—
0001 1000
1111 1111
02h
NV Wiper 0
Write Data
nn nnnn nnnn
0010 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0010 11nn nnnn nnnn
1111 111n nnnn nnnn
HV Inc. (WL0 DIS) (3)
—
0010 0100
1111 1111
HV Dec. (WL0 EN) (4)
—
0010 1000
1111 1111
03h
NV Wiper 1
Write Data
nn nnnn nnnn
0011 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0011 11nn nnnn nnnn
1111 111n nnnn nnnn
HV Inc. (WL1 DIS) (3)
—
0011 0100
1111 1111
HV Dec. (WL1 EN) (4)
—
0011 1000
1111 1111
04h (5) Volatile
TCON Register
Write Data
nn nnnn nnnn
0100 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0100 11nn nnnn nnnn
1111 111n nnnn nnnn
05h (5) Status Register
Read Data
nn nnnn nnnn
0101 11nn nnnn nnnn
1111 111n nnnn nnnn
06h (5) Data EEPROM
Write Data
nn nnnn nnnn
0110 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0110 11nn nnnn nnnn
1111 111n nnnn nnnn
07h (5) Data EEPROM
Write Data
nn nnnn nnnn
0111 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
0111 11nn nnnn nnnn
1111 111n nnnn nnnn
08h (5) Data EEPROM
Write Data
nn nnnn nnnn
1000 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1000 11nn nnnn nnnn
1111 111n nnnn nnnn
09h (5) Data EEPROM
Write Data
nn nnnn nnnn
1001 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1001 11nn nnnn nnnn
1111 111n nnnn nnnn
0Ah (5) Data EEPROM
Write Data
nn nnnn nnnn
1010 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1010 11nn nnnn nnnn
1111 111n nnnn nnnn
0Bh (5) Data EEPROM
Write Data
nn nnnn nnnn
1011 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1011 11nn nnnn nnnn
1111 111n nnnn nnnn
0Ch (5) Data EEPROM
Write Data
nn nnnn nnnn
1100 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1100 11nn nnnn nnnn
1111 111n nnnn nnnn
0Dh (5) Data EEPROM
Write Data
nn nnnn nnnn
1101 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1101 11nn nnnn nnnn
1111 111n nnnn nnnn
0Eh (5) Data EEPROM
Write Data
nn nnnn nnnn
1110 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1110 11nn nnnn nnnn
1111 111n nnnn nnnn
0Fh
Data EEPROM
Write Data
nn nnnn nnnn
1111 00nn nnnn nnnn
1111 1111 1111 1111
Read Data
nn nnnn nnnn
1111 11nn nnnn nnnn
1111 111n nnnn nnnn
HV Inc. (WP DIS) (3)
—
1111 0100
1111 1111
HV Dec. (WP EN) (4)
—
1111 1000
1111 1111
Note 1:
The Data Memory is only 9-bits wide, so the MSb is ignored by the device.
2:
All these Address/Command combinations are valid, so the CMDERR bit is set. Any other Address/Command combi-
nation is a command error state and the CMDERR bit will be clear.
3:
Disables WiperLock Technology for wiper 0 or wiper 1, or disables Write Protect.
4:
Enables WiperLock Technology for wiper 0 or wiper 1, or enables Write Protect.
5:
Reserved addresses
: Increment or Decrement commands are invalid for these addresses.
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