參數資料
型號： MCP41050
廠商： Microchip Technology Inc.
元件分類： FPGA
英文描述： 400000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述： 單/雙數字電位器接口與SPI⑩
文件頁數： 5/33頁
文件大小： 682K
代理商： MCP41050
2003 Microchip Technology Inc.
DS11195C-page 5
MCP41XXX/42XXX
Absolute Maximum Ratings
V
DD
...................................................................................7.0V
All inputs and outputs w.r.t. V
SS
............... -0.6V to V
DD
+1.0V
Storage temperature.....................................-60°C to +150°C
Ambient temp. with power applied................-60°C to +125°C
ESD protection on all pins
..................................................≥
2 kV
Notice:
Stresses above those listed under “maximum rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
AC TIMING CHARACTERISTICS
Electrical Characteristics:
Unless otherwise indicated, V
DD
= +2.7V to 5.5V, T
A
= -40°C to +85°C.
Parameter
Sym
Min.
Typ.
Max.
Units
Conditions
Clock Frequency
F
CLK
t
HI
t
LO
t
CSSR
t
SU
t
HD
t
DO
t
CHS
t
CS0
t
CS1
t
CSH
t
RS
t
RSCS
t
SE
t
CSL
t
SH
—
—
10
MHz
V
DD
= 5V
(Note 1)
Clock High Time
40
—
—
ns
Clock Low Time
40
—
—
ns
CS Fall to First Rising CLK Edge
40
—
—
ns
Data Input Setup Time
40
—
—
ns
Data Input Hold Time
10
—
—
ns
SCK Fall to SO Valid Propagation Delay
—
80
ns
C
L
= 30 pF
(Note 2)
SCK Rise to CS Rise Hold Time
30
—
—
ns
SCK Rise to CS Fall Delay
10
—
—
ns
CS Rise to CLK Rise Hold
100
—
—
ns
CS High Time
40
—
—
ns
Reset Pulse Width
150
—
—
ns
Note 2
RS Rising to CS Falling Delay Time
150
—
—
ns
Note 2
CS rising to RS or SHDN falling delay time
40
—
—
ns
Note 3
CS low time
100
—
—
ns
Note 3
Shutdown Pulse Width
150
—
—
ns
Note 3
Note
1:
When using the device in the daisy-chain configuration, maximum clock frequency is determined by a combination of propagation delay
time (t
DO
) and data input setup time (t
SU
). Max. clock frequency is therefore ~ 5.8 MHz based on SCK rise and fall times of 5 ns, t
HI
=
40 ns, t
DO
= 80 ns and t
SU
= 40 ns.
Applies only to the MCP42XXX devices.
Applies only when using hardware pins to exit software shutdown mode, MCP42XXX only.
2:
3:
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相關代理商/技術參數
參數描述
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MCP41050E/SL 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Single/Dual Digital Potentiometer with SPI Interface
MCP41050E/SN 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Single/Dual Digital Potentiometer with SPI Interface
MCP41050-E/SN 功能描述:數字電位計 IC 256 Step SPI 50kOhm RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數:35 PPM / C 容差:25 % POT 數量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel
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