參數(shù)資料
型號(hào)： MCP3553T-E/MS
廠商： Microchip Technology
文件頁(yè)數(shù)： 7/36頁(yè)
文件大?。?/td> 0K
描述： IC ADC 22BIT 2.7V 1CH SPI 8MSOP
產(chǎn)品培訓(xùn)模塊： MCP3901 Analog Front End
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 22
采樣率（每秒）： 60
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 8-MSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，單極
配用： MCP355XDV-MS1-ND - BOARD DEV SENSOR APP MCP355X
MCP355XDM-TAS-ND - BOARD DEMO TINY APP SNSR MCP355X
2009 Microchip Technology Inc.
DS21950E-page 15
MCP3550/1/3
4.0
DEVICE OVERVIEW
The MCP3550/1/3 devices are 22-bit delta-sigma
ADCs that include fully differential analog inputs, a
third-order delta-sigma modulator, a fourth-order
modified SINC decimation filter, an on-chip, low-noise
internal oscillator, a power supply monitoring circuit and
an SPI 3-wire digital interface. These devices can be
easily used to measure low-frequency, low-level
signals such as those found in pressure transducers,
temperature, strain gauge, industrial control or process
control applications. The power supply range for this
product family is 2.7V to 5.5V; the temperature range is
-40°C to +125°C. The functional block diagram for the
MCP3550/1/3 devices is shown in Figure 4-1.
A Power-On Reset (POR) monitoring circuit is included
to ensure proper power supply voltages during the
conversion process. The clock source for the part is
internally generated to ±0.5% over the full-power
supply voltage range and industrial temperature range.
This stable clock source allows for superior conversion
repeatability and minimal drift across conversions.
The MCP3550/1/3 devices employ a delta-sigma
conversion technique to realize up to 22 bits of no
missing code performance with 21.9 Effective Number
of Bits (ENOB). These devices provide single-cycle
conversions with no digital filter settling time. Every
conversion includes an internal offset and gain auto-
calibration to reduce device error. These calibrations
are transparent to the user and are done in real-time
during the conversion. Therefore, these devices do not
require any additional time or conversion to proceed,
allowing easy usage of the devices for multiplexed
applications. The MCP3550/1/3 devices incorporate a
fourth-order digital decimation filter in order to allow
superior averaging performance, as well as excellent
line frequency rejection capabilities. The oversampling
frequency also reduces any external anti-aliasing filter
requirements.
The MCP3550/1/3 devices communicate with a simple
3-wire SPI interface. The interface controls the
conversion start event, with an added feature of an
auto-conversion at system power-up by tying the CS
pin to logic-low. The device can communicate with bus
speeds of up to 5 MHz, with 50 pF capacitive loading.
The interface offers two conversion modes: Single
Conversion mode for multiplexed applications and a
Continuous Conversion mode for multiple conversions
in series. Every conversion is independent of each
other. That is, all internal registers are flushed between
conversions. When the device is not converting, it auto-
matically goes into Shutdown mode and, while in this
mode, consumes less than 1 A.
FIGURE 4-1:
MCP3550/1/3 Functional Block Diagram.
Internal
Oscillator
Third-Order
ΔΣ
Modulator
Digital
Decimation
Filter (SINC4)
SPI 3-wire
Interface
Gain and
Offset
Calibration
Differential
Analog Input
Bit
Conversion
Code
Output
Code
Clock
Charge
Transfer
Reference
Input
Stream
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