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參數(shù)資料
| 型號： | MCP3551 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs |
| 中文描述： | 低功耗，單通道22位Δ-Σ模數(shù)轉換器 |
| 文件頁數(shù)： | 14/30頁 |
| 文件大小： | 616K |
| 代理商： | MCP3551 |
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MCP3551/3
DS21950B-page 14
2005 Microchip Technology Inc.
:
FIGURE 4-2:
MCP3551 device, simultaneous 50/60 Hz
Rejection.
SINC filter response,
FIGURE 4-3:
Integer Multiples of the Sampling Frequency (f
s
)
SINC Filter Response at
4.3
Internal Oscillator
The MCP3551/3 devices include a highly stable and
accurate internal oscillator that provides clock signals
to the delta-sigma ADC with minimum jitter. The oscil-
lator is a specialized structure with a low temperature
coefficient across the full range of specified operation,
see Table 4-1 for oscillator frequencies.
The conversion time is an integer multiple of the inter-
nal clock period and, therefore, has the same accuracy
as the internal clock frequency. The oscillator
frequency is 112.64 kHz ±0.5% for the MCP3551 and
122.88 kHz ±0.5% for the MCP3553 devices across
the full power supply voltage and specified temperature
ranges.
The notch of the digital filter is proportional to the
internal oscillator frequency, with the exact notch
frequency equivalent to the oscillator accuracy (< 0.5%
deviation). This high accuracy, combined with wide
notches, will ensure that the MCP3551 includes both
50 Hz and 60 Hz line frequency rejection by the digital
filtering, even when jitter is present.
The internal oscillator is held in the Reset condition
when the part is in Shutdown mode to ensure very low
power consumption (< 1 μA in Shutdown mode). The
internal oscillator is independent of all serial digital
interface edges (i.e., state machine processing the
digital SPI interface is asynchronous with respect to the
internal clock edges).
4.4
The MCP3551/3 devices accept a fully differential ana-
log input voltage to be connected to the V
IN+
and V
IN-
input pins. The differential voltage that is converted is
defined by V
IN
= V
IN
+ - V
IN
-. The differential voltage
range specified for ensured accuracy is from -V
REF
to
+V
REF
.
The converter will output valid and usable codes from
-112% to 112% of output range (see
Section 5.0
“Serial Interface”
) at room temperature. The ±12%
overrange is clearly specified by two overload bits in
the output code: OVH and OVL. This feature allows for
system calibration of a positive gain error.
The absolute voltage range on these input pins extends
from V
SS
- 0.3V to V
DD
+ 0.3V. If the input voltages are
above or below this range, the leakage currents of the
ESD diodes will increase exponentially, degrading the
accuracy and noise performance of the converter. The
common mode of the analog inputs should be chosen
such that both the differential analog input range and
absolute voltage range on each pin are within the
specified operating range defined in the
Section 1.0
“Electrical Characteristics”
.
Both the analog differential inputs and the reference
input have switched-capacitor input structures. The
input capacitors are charged and discharged alterna-
tively with the input and the reference in order to
process a conversion. The charge and discharge of the
input capacitors create dynamic input currents at the
V
IN
+ and V
IN
- input pins inversely proportional to the
sampling capacitor. This current is a function of the
differential input voltages and their respective common
modes. The typical value of the differential input imped-
ance is 2.4 M
Ω
, with V
CM
= 2.5V, V
DD
= V
REF
= 5V. The
DC leakage current caused by the ESD input diodes,
even though on the order of 1 nA, can cause additional
offset errors proportional to the source resistance at the
V
IN
+ and V
IN
- input pins.
From a transient response standpoint and as a
first-order approximation, these input structures form a
simple RC filtering circuit with the source impedance in
series with the R
ON
(switched resistance when closed)
of the input switch and the sampling capacitor. In order
to ensure the accuracy of the sampled charge, proper
settling time of the input circuit has to be considered.
Slow settling of the input circuit will create additional
gain error. As a rule of thumb, in order to obtain 1 ppm
absolute measurement accuracy, the sampling period
must be 14 times greater than the input circuit RC time
constant.
Differential Analog Inputs
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0
10
20
30
40
Frequency (Hz)
50
60
70
80
90 100 110
A
-140
-120
-100
-80
-60
-40
-20
0
0
28160
56320
84480 112640 140800 168960 197120 225280 253440
Frequency (Hz)
N
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| MCP3551-50I/MS | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3551-50I/SN | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3551-60I/MS | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3551-60I/SN | 功能描述:模數(shù)轉換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3551DM-PCTL | 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 MCP3551 Delta Sigma ADC Demo Brd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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