- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10465 > MCP3550T-50E/SN (Microchip Technology)IC ADC 22BIT 2.7V 1CH 8SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | MCP3550T-50E/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 22BIT 2.7V 1CH 8SOIC |
| 產(chǎn)品培訓(xùn)模塊： | MCP3901 Analog Front End |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 位數(shù)： | 22 |
| 采樣率（每秒）： | 12.5 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)差分，單極 |
| 配用： | MCP355XDV-MS1-ND - BOARD DEV SENSOR APP MCP355X MCP355XDM-TAS-ND - BOARD DEMO TINY APP SNSR MCP355X |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
2009 Microchip Technology Inc.
DS21950E-page 23
MCP3550/1/3
5.3
Single Conversion Mode
If a rising edge of Chip Select (CS) occurs during tCONV,
a subsequent conversion will not take place and the
device will enter low-power Shutdown mode after
tCONV completes. This is referred to as Single
Conversion mode. This operation is demonstrated in
Figure 5-2. Note that a falling edge of CS during the
same conversion that detected a rising edge, as in
Figure 5-2, will not initiate a new conversion. The data
must be read during sleep mode, with CSN low, and will
be lost as soon as the part enters in shutdown mode
(with a rising edge of CSN). After the final data bit has
been clocked out on the 25th clock, the SDO/RDY pin
will go active-high.
5.3.1
READY FUNCTION OF SDO/RDY
PIN, SINGLE CONVERSION MODE
At every falling edge of CS during the internal
conversion, the state of the internal conversion is
latched on the SDO/RDY pin to give ready or busy
information. A High state means the device is currently
performing an internal conversion and data cannot be
clocked out. A Low state means the device has finished
its conversion and the data is ready for retrieval on the
falling edge of SCK. This operation is demonstrated in
Figure 5-4. Note that the device has been put into
Single Conversion mode with the first rising edge of
CS.
FIGURE 5-4:
RDY Functionality in Single
Conversion Mode.
5.4
Continuous Conversion Mode
If no rising edge of CS occurs during any given
conversion per Figure 5-3, a subsequent conversion
will take place and the contents of the previous conver-
sion will be overwritten. This operation is demonstrated
in Figure 5-5. Once conversion output data has started
to be clocked out, the output buffer is not refreshed until
all 24 bits have been clocked. A complete read must
occur in order to read the next conversion in this mode.
The subsequent conversion data to be read will then be
the most recent conversion. The conversion time is
fixed and cannot be shortened by the rising edge of CS.
This rising edge will place the part in Shutdown mode
and all conversion data will be lost.
The transfer of data from the SINC filter to the output
buffer is demonstrated in Figure 5-5. If the previous
conversion data is not clocked out of the device, it will
be lost and replaced by the new conversion. When the
device is in Continuous Conversion mode, the most
recent conversion data is always present at the output
register for data retrieval.
FIGURE 5-5:
Most Current Continuous
Conversion Mode Data.
If a conversion is in process, it cannot be terminated
with the rising edge of CS. SDO/RDY must first
transition to a Low state, which will indicate the end of
conversion.
Note:
The Ready state is latched on each falling
edge of CS and will not dynamically
update if CS is held low. CS must be
toggled high through low.
tCONV
CS
Int. Osc
SDO/RDY
Hi-Z
tCONV
CS
Int. Osc
SCK & SDO/RDY
A
B
C
Conversion B data is clocked
out of the device here.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCP3553T-E/SN | IC ADC 22BIT 2.7V 1CH SPI 8SOIC |
| MCP3551T-E/SN | IC ADC 22BIT 2.7V 1CH SPI 8SOIC |
| 17280-3SG-300 | CONN RCPT 3POS PNL MNT SKT |
| MCP3204T-BI/SL | IC ADC 12BIT 2.7V 4CH SPI 14SOIC |
| 17291-2SG-300 | CONN RCPT 2POS PNL MNT SKT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP3550T-60 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs |
| MCP3550T-60E/MS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 22-bit ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3550T-60-E/MS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs |
| MCP3550T-60E/SN | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 22-bit ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3550T-60-E/SN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。