參數(shù)資料
型號: MCP25050T-E/SL
廠商: Microchip Technology
文件頁數(shù): 18/66頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER CAN 8B 14SOIC
標(biāo)準(zhǔn)包裝: 2,600
接口: CAN
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時鐘: 25MHz
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 帶卷 (TR)
包括: ADC,存儲器,PWM
其它名稱: MCP25050TE/SL
2007
Micr
ochip
T
e
ch
nol
ogy
I
n
c.
DS21664D
-page
25
MCP2502X/5X
TABLE 4-2:
COMMAND MESSAGES (STANDARD IDENTIFIER)
Information Request Messages (to MCP2502X/5X)
Standard ID
Data Bytes
1
0
98 76543 210
R
T
R
I
D
E
DLC
Read A/D Regs
xxxx xxx * 0 0 0 1*
0 1 0 0 0
8*
n/a
Read Control Regs
xxxx xxx * 0 0 1 1*
0 0 1 1 1
7*
n/a
Read Config Regs
xxxx xxx * 0 1 0 1*
0 0 1 0 1
5*
n/a
Read CAN Error
xxxx xxx * 0 1 1 1*
0 0 0 1 1
3*
n/a
Read PWM Config
xxxx xxx * 1 0 0 1*
0 0 1 1 0
6*
n/a
Read User Mem (bank1)
xxxx xxx * 1 0 1 1*
0 1 0 0 0
8*
n/a
Read User Mem (bank 2)
xxxx xxx * 1 1 0 1*
0 1 0 0 0
8*
n/a
Output Messages (from MCP2502X/5X)
Standard ID
Data Bytes
1
0
98 765 43 21 0 R
T
R
I
D
E
DLC
Read A/D Regs
x
*
0 0 0 00 1 0 0 0 8
IOINTFL
GPIO
AN0H
AN1H
AN10L
AN2H
AN3H
AN32L
Read Control Regs
x
*
0 0 1 00 0 1 1 1 7
ADCON0
ADCON1
OPTREG
STCON
IOINTEN
IOINTPO
n/a
Read Config Regs
x
*
0 1 0 00 0 1 0 1 5
DDR
GPIO
CNF1
CNF2
CNF3
n/a
Read CAN Error
x
*
0 1 1 00 0 0 1 1 3EFLG
TEC
REC
n/a
Read PWM Config
x
*
1 0 0 00 0 1 1 0 6
PR1
PR2
T1CON
T2CON
PWM1DC
PWM2DC
n/a
Read User Mem (bank1)
x
*
1 0 1 00 1 0 0 0 8
USERID0
USERID1
USERID2
USERID3
USERID4
USERID5
USERID6
USERID7
Read User Mem (bank 2)
x
*
1 1 0 00 1 0 0 0 8
USERID8
USERID9
USERID1
Input Messages** (to MCP2502X/5X)
Standard ID
Data Bytes
1
0
98 765 43 21 0 R
T
R
I
D
E
DLC
Write Register
x
x 0 0 0 00 0 0 1 1 3
addr
mask
value
n/a
Write TX Message ID 0
x
x 0 0 1 00 0 1 0 0 4
TX0SIDH
TX0SIDL
TX0EID8
TX0EID0
n/a
Write TX Message ID 1
x
x 0 1 0 00 0 1 0 0 4
TX1SIDH
TX1SIDL
TX1EID8
TX1EID0
n/a
Write TX Message ID 2
x
x 0 1 1 00 0 1 0 0 4
TX2SIDH
TX2SIDL
TX2EID8
TX2EID0
n/a
Write I/O Configuration
x
x 1 0 0 00 0 1 0 1 5
IOINTEN
IOINTPO
DDR
OPTREG
ADCON1
n/a
Write RX Mask
x
xxx
xx 1 0 1 00 0 1 0 0 4 RXMSIDH
RXMSIDL
RXMEID8
RXMEID0
n/a
Write RX Filter0
x
x 1 1 0 00 0 1 0 0 4
RXF0SID
RXF0EID
n/a
Write RX Filter1
x
x 1 1 1 00 0 1 0 0 4
RXF1SID
RXF1EID
n/a
* If using non-RTR messages for information request messages (IRM), the RTR bit = 0, DLC bit field = 0, and bit 3 of the IRM ID = 1. Also, bit 3 of the output message ID = 0.
If using RTR messages for IRMs, the RTR bit = 1, DLC bit field = number of bytes in corresponding output message, and bit three of the IRM ID = x (don’t care), also, bit 3 of the
output message = x (don’t care).
** User-defined IRM IDs must be different from input message IDs to avoid message contention between the corresponding output message and the input message.
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