參數(shù)資料
型號: MCP23S17-E/SS
廠商: Microchip Technology
文件頁數(shù): 10/48頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER SPI 16B 28SSOP
產(chǎn)品培訓模塊: GPIO Expanders
標準包裝: 47
接口: SPI
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時鐘: 10MHz
電源電壓: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應商設備封裝: 28-SSOP
包裝: 管件
產(chǎn)品目錄頁面: 684 (CN2011-ZH PDF)
配用: MCP23X17EV-ND - BOARD EVAL FOR MCP23X17
GPIODM-KPLCD-ND - BOARD DEMO LCD GPIO EXP KEYPAD
MCP23017/MCP23S17
DS21952B-page 18
2007 Microchip Technology Inc.
REGISTER 1-6:
IOCON – I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)
R/W-0
U-0
BANK
MIRROR
SEQOP
DISSLW
HAEN
ODR
INTPOL
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
BANK: Controls how the registers are addressed
1 = The registers associated with each port are separated into different banks
0 = The registers are in the same bank (addresses are sequential)
bit 6
MIRROR: INT Pins Mirror bit
1 = The INT pins are internally connected
0 = The INT pins are not connected. INTA is associated with PortA and INTB is associated with PortB
bit 5
SEQOP: Sequential Operation mode bit.
1 = Sequential operation disabled, address pointer does not increment.
0 = Sequential operation enabled, address pointer increments.
bit 4
DISSLW: Slew Rate control bit for SDA output.
1 = Slew rate disabled.
0 = Slew rate enabled.
bit 3
HAEN: Hardware Address Enable bit (MCP23S17 only).
Address pins are always enabled on MCP23017.
1 = Enables the MCP23S17 address pins.
0 = Disables the MCP23S17 address pins.
bit 2
ODR: This bit configures the INT pin as an open-drain output.
1 = Open-drain output (overrides the INTPOL bit).
0 = Active driver output (INTPOL bit sets the polarity).
bit 1
INTPOL: This bit sets the polarity of the INT output pin.
1 = Active-high.
0 = Active-low.
bit 0
Unimplemented: Read as ‘0’.
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