MCP2003/4/3A/4A
DS22230D-page 14
2010-2011 Microchip Technology Inc.
Bus Interface
High Level Input Voltage
VIH(LBUS)
0.6 VBB
—
V
Recessive state
Low Level Input Voltage
VIL(LBUS)-8
—
0.4 VBB
V
Dominant state
Input Hysteresis
VHYS
—
0.175 VBB
VVIH(LBUS) – VIL(LBUS)
Low Level Output Current
IOL(LBUS)
40
—
200
mA
Output voltage = 0.1 VBB,
VBB = 12V
High Level Output Current
IOH(LBUS)—
—
20
A
Pull-up Current on Input
IPU(LBUS)5
—
180
A
~30 k
Ω internal pull-up
@ VIH (LBUS) = 0.7 VBB
Short Circuit Current Limit
ISC
50
—
200
mA
High Level Output Voltage
VOH(LBUS)
0.9 VBB
—VBB
V
Driver Dominant Voltage
V_LOSUP
——
1.2
V
VBB = 7V, RLOAD = 500
Ω
Driver Dominant Voltage
V_HISUP
——
2.0
V
VBB = 18V, RLOAD = 500
Ω
Driver Dominant Voltage
V_LOSUP-1K
0.6
—
V
VBB = 7V, RLOAD = 1 k
Ω
Driver Dominant Voltage
V_HISUP-1K
0.8
—
V
VBB = 18V, RLOAD = 1 k
Ω
Input Leakage Current
(at the receiver during
dominant bus level)
IBUS_PAS_DOM
-1
-0.4
—
mA
Driver off,
VBUS = 0V,
VBB = 12V
Input Leakage Current
(at the receiver during
recessive bus level)
IBUS_PAS_REC
—
12
20
A
Driver off,
8V < VBB < 18V
8V < VBUs < 18V
VBUS
≥ VBB
Leakage Current
(disconnected from ground)
IBUS_NO_GND
-10
1.0
+10
A
GNDDEVICE = VBB,
0V < VBUS < 18V,
VBB = 12V
Leakage Current
(disconnected from VBB)
IBUS_NO_VBB
——
10
A
VBB = GND,
0 < VBUS < 18V,
Receiver Center Voltage
VBUS_CNT
0.475 VBB
0.5
VBB
0.525 VBB
VVBUS_CNT = (VIL (LBUS) +
VIH (LBUS))/2
Slave Termination
RSLAVE
20
30
47
k
Ω
Capacitance of Slave Node
CSLAVE
50
pF
2.3
DC Specifications (Continued)
DC Specifications
Electrical Characteristics:
Unless otherwise indicated, all limits are specified for:
VBB = 6.0V to 30.0V
TA = -40°C to +125°C
Parameter
Sym
Min.
Typ.
Max.
Units
Conditions
Note 1:
Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0
Ω, TX = 0.4 VREG, VLBUS = VBB).
2:
Node has to sustain the current that can flow under this condition; bus must be operational under this
condition.