參數(shù)資料
型號: MCM6729WJ10R2
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 256K x 4 Bit Fast Static Random Access Memory
中文描述: 256K X 4 STANDARD SRAM, 10 ns, PDSO32
封裝: 0.400 INCH, PLASTIC, SOJ-32
文件頁數(shù): 1/8頁
文件大?。?/td> 145K
代理商: MCM6729WJ10R2
MCM6729
1
Motorola, Inc. 1995
256K x 4 Bit Fast Static Random
Access Memory
The MCM6729 is a 1,048,576 bit static random access memory organized as
262,144 words of 4 bits. This device is fabricated using high performance silicon–
gate BiCMOS technology. Static design eliminates the need for external clocks
or timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
This device meets JEDEC standards for functionality and revolutionary pinout,
and is available in a 400 mil plastic small–outline J–leaded package.
Single 5 V
±
10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs Are TTL Compatible
Three State Outputs
Fast Access Times: 10, 12 ns
Center Power and I/O Pins for Reduced Noise
BLOCK DIAGRAM
ROW
DECODER
MEMORY
MATRIX
512 ROWS x 512 x 4
COLUMNS
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
A
A
A
A
A
A
A
A
DQ0
A
A
A
A
A
E
W
G
VCC
VSS
A
A
A
A
A
DQ3
Order this document
by MCM6729/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MCM6729
WJ PACKAGE
400 MIL SOJ
CASE 857A–02
32
31
30
29
28
27
26
25
24
23
22
21
2
3
1
5
6
4
7
9
10
8
12
13
11
14
20
15
16
19
18
17
A
A
A
A
E
A
W
A
A
A
VCC
VSS
A
A
A
A
DQ2
A
G
DQ3
A
A
A
A
VCC
VSS
DQ0
DQ1
NC
A
NC
NC
A0 – A17
E
. . . . . . . . . . . . . . . . . . . . . .
W
. . . . . . . . . . . . . . . . . . . .
G
. . . . . . . . . . . . . . . . . . .
DQ0 – DQ3
. . . . . . . .
VCC
. . . . . . . . . . . .
VSS
. . . . . . . . . . . . . . . . . . . . . . .
NC
. . . . . . . . . . . . . . . . . .
Address Input
Chip Enable
Write Enable
Output Enable
Data Input/Output
+ 5 V Power Supply
. . . . . . . . . . . . . .
Ground
No Connection
PIN NAMES
REV 4
5/95
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