參數(shù)資料
型號: MCM6709BJ12R
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 64K x 4 Bit Static RAM
中文描述: 64K X 4 STANDARD SRAM, 12 ns, PDSO28
封裝: 0.300 INCH, PLASTIC, SOJ-28
文件頁數(shù): 1/7頁
文件大?。?/td> 102K
代理商: MCM6709BJ12R
MCM6709B
1
Motorola, Inc. 1996
Product Preview
64K x 4 Bit Static RAM
The MCM6709B is a 262,144 bit static random access memory organized as
65,536 words of 4 bit. Static design eliminates the need for external clocks or tim-
ing strobes.
Output enable (G), a special control feature of the MCM6709B, provides in-
creased system flexibility and eliminates bus contention problems.
The MCM6709B is available in a 300 mil, 28 lead plastic surface–mount SOJ
package.
Single 5 V
±
10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs are TTL Compatible
Three State Outputs
Fast Access Times: MCM6709B–8 = 8 ns
MCM6709B–10 = 10 ns
MCM6709B–12 = 12 ns
BLOCK DIAGRAM
G
INPUT
DATA
CONTROL
MEMORY MATRIX
256 ROWS x 256 x 4
COLUMNS
COLUMN I/O
COLUMN DECODER
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
DQ
DQ
E
W
ROW
DECODER
This document contains informantion on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
Order this document
by MCM6709B/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MCM6709B
J PACKAGE
300 MIL SOJ
CASE 810B–03
NC
A
A
A
A
A
A
A
A
A
A
E
G
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
A
A
A
A
A
A
NC
NC
DQ
DQ
DQ
DQ
W
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
W
G
E
DQ
VCC
VSS
NC
Address Inputs
Write Enable
Output Enable
Chip Enable
Data Input/Output
+ 5 V Power Supply
. . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
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. . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . .
Ground
No Connection
PIN NAMES
REV 1
10/9/96
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