參數(shù)資料
型號(hào): MCM6265CJ35R2
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 8K x 9 Bit Fast Static RAM
中文描述: 8K X 9 STANDARD SRAM, 35 ns, PDSO28
封裝: 0.300 INCH, PLASTIC, SOJ-28
文件頁(yè)數(shù): 6/8頁(yè)
文件大小: 177K
代理商: MCM6265CJ35R2
MCM6265C
6
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
– 12
– 15
– 20
– 25
– 35
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELEH,
tELWH
12
15
20
25
35
ns
3
Address Setup Time
0
0
0
0
0
ns
Address Valid to End of Write
12
12
15
20
25
ns
Enable to End of Write
10
10
12
15
25
ns
4, 5
Write Pulse Width
tWLEH
tDVEH
tEHDX
tEHAX
10
12
15
17
20
ns
Data Valid to End of Write
7
7
8
10
15
ns
Data Hold Time
0
0
0
0
0
ns
Write Recovery Time
0
0
0
0
0
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E.
3. All timings are referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance state.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance state.
WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
tEHDX
tDVEH
tEHAX
tELEH
tELWH
tWLEH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
相關(guān)PDF資料
PDF描述
MCM6265C 8K x 9 Bit Fast Static RAM
MCM6265CP12 8K x 9 Bit Fast Static RAM
MCM6265CP15 8K x 9 Bit Fast Static RAM
MCM6265CP20 8K x 9 Bit Fast Static RAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCM6265CP12 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 9 Bit Fast Static RAM
MCM6265CP15 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 9 Bit Fast Static RAM
MCM6265CP20 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 9 Bit Fast Static RAM
MCM6265CP25 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 9 Bit Fast Static RAM
MCM6265CP35 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 9 Bit Fast Static RAM