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參數(shù)資料
| 型號(hào)： | MCIMX512DVK8C |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA625 |
| 封裝： | 13 X 13 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-625 |
| 文件頁(yè)數(shù)： | 35/184頁(yè) |
| 文件大?。?/td> | 3644K |
| 代理商： | MCIMX512DVK8C |
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Features
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1
Freescale Semiconductor
13
Preliminary—Subject to Change Without Notice
PMIC_INT_REQ
When using the MC13892 power management IC, the PMIC_INT_REQ high-priority interrupt input
on i.MX51 should be either floated or tied to NVCC_SRTC_POW with a 4.7 k
Ω to 68 kΩ resistor.
This avoids a continuous current drain on the real-time clock backup battery due to a 100 k
Ω
on-chip pull-up resistor.
PMIC_INT_REQ is not used by the Freescale BSP (board support package) software. The BSP
requires that the general-purpose INT output from the MC13892 be connected to i.MX51 GPIO
input GPIO1_8 configured to cause an interrupt that is not high-priority.
The original intent was for PMIC_INT_REQ to be connected to a circuit that detects when the
battery is almost depleted. In this case, the I/O must be configured as alternate mode 0 (ALT0 =
power fail).
POR_B
This cold reset negative logic input resets all modules and logic in the IC.
Note: The POR_B input must be immediately asserted at power-up and remain asserted until
after the last power rail is at its working voltage.
RESET_IN_B
This warm reset negative logic input resets all modules and logic except for the following:
Test logic (JTAG, IOMUXC, DAP)
SRTC
Memory repair – Configuration of memory repair per fuse settings
Cold reset logic of WDOG – Some WDOG logic is only reset by POR_B. See WDOG chapter
in i.MX51 Reference Manual for details.
RREFEXT
Determines the reference current for the USB PHY bandgap reference. An external 6.04 k
Ω 1%
resistor to GND is required.
SGND, SVCC, and
SVDDGP
These sense lines provide the ability to sense actual on-chip voltage levels on their respective
supplies. SGND monitors differentials of the on-chip ground versus an external power source.
SVCC monitors on-chip VCC, and SVDDGP monitors VDDGP. Freescale recommends connection
of the SVCC and SVDDGP signals to the feedback inputs of switching power-supplies or to test
points.
STR
This signal is reserved for Freescale manufacturing use. The user should float this signal.
TEST_MODE
TEST_MODE is for Freescale factory use only. This signal is internally connected to an on-chip
pull-down device. Users must either float this signal or tie it to GND.
VREF
When using VREF with DDR-2 I/O, the nominal 0.9 V reference voltage must be half of the
NVCC_EMI_DRAM supply. The user must tie VREF to a precision external resistor divider. Use a
1 k
Ω 0.5% resistor to GND and a 1 kΩ 0.5% resistor to NVCC_EMI_DRAM. Shunt each resistor
with a closely-mounted 0.1 F capacitor.
To reduce supply current, a pair of 1.5 k
Ω 0.1% resistors can be used. Using resistors with
recommended tolerances ensures the ± 2% VREF tolerance (per the DDR-2 specification) is
maintained when four DDR-2 ICs plus the i.MX51 are drawing current on the resistor divider.
Note: When VREF is used with mDDR this signal must be tied to GND.
VREFOUT
This signal determines the Triple Video DAC (TVDAC) reference voltage. The user must tie
VREFOUT to an external 1.18 k
Ω 1% resistor to GND.
Table 3. Special Signal Considerations (continued)
Signal Name
Remarks
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MCIMX512DVK8C,
MCIMX513DVK8C,
MCIMX515DVK8C,
and
MCIMX511DVK8C.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCIMX513CJM6C | 功能描述:處理器 - 專門(mén)應(yīng)用 iMX513 App Processor RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MCIMX513CJM6CR2 | 功能描述:處理器 - 專門(mén)應(yīng)用 i.MX51 32bit 800 MHz RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MCIMX513DJM8C | 功能描述:處理器 - 專門(mén)應(yīng)用 iMX513 App Processor Extended Temp RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MCIMX513DJM8CR2 | 功能描述:處理器 - 專門(mén)應(yīng)用 i.MX51 32bit 800 MHz RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MCIMX514AJM6C | 功能描述:處理器 - 專門(mén)應(yīng)用 ELVIS 3.0 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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