參數(shù)資料
型號(hào): MCIMX357CJQ5C
廠商: Freescale Semiconductor
文件頁數(shù): 27/147頁
文件大?。?/td> 0K
描述: MPU MX35 ARM11 400-MAPBGA
產(chǎn)品培訓(xùn)模塊: i.MX35 Processor
OpenVG™ on i.MX35 Graphics
標(biāo)準(zhǔn)包裝: 90
系列: i.MX35
核心處理器: ARM11
芯體尺寸: 32-位
速度: 532MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 96
程序存儲(chǔ)器類型: ROMless
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.33 V ~ 1.47 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 10
Freescale Semiconductor
122
4.9.23.1.12
UART Receiver
Figure 97 depicts the RS-232 serial mode receive timing, with 8 data bit/1 stop bit format. Table 83 lists
serial mode receive timing characteristics.
Figure 97. UART RS-232 Serial Mode Receive Timing Diagram
4.9.23.2
UART IrDA Mode Timing
The following subsections give the UART transmit and receive timings in IrDA mode.
4.9.23.2.13
UART IrDA Mode Transmitter
Figure 98 depicts the UART IrDA mode transmit timing, with 8 data bit/1 stop bit format. Table 84 lists
the transmit timing characteristics.
Figure 98. UART IrDA Mode Transmit Timing Diagram
Table 82. RS-232 Serial Mode Transmit Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA1
Transmit Bit Time
tTbit
1/Fbaud_rate
1
Tref_clk
2
1 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
2 T
ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).
1/Fbaud_rate +
Tref_clk
Table 83. RS-232 Serial Mode Receive Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA2
Receive Bit Time1
1 The UART receiver can tolerate 1/(16
× F
baud_rate) tolerance in each bit. But accumulation tolerance in one frame must not
exceed 3/(16
× F
baud_rate).
tRbit
1/Fbaud_rate
2
1/(16
× F
baud_rate)
2 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency) ÷ 16.
1/Fbaud_rate +
1/(16
× F
baud_rate)
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
RXD
(input)
Bit 3
Start
Bit
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA2
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
TXD
(output)
Bit 3
Start
Bit
STOP
BIT
Possible
Parity
Bit
UA3
UA4
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MCIMX357CJQ5C 制造商:Freescale Semiconductor 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE
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