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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | MCIMX253CVM4 |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 132/153闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MPU I.MX25 IND 400MAPBGA |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 90 |
| 绯诲垪锛� | i.MX25 |
| 鏍稿績铏曠悊鍣細 | ARM9 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 400MHz |
| 閫ｉ€氭€э細 | 1 绶�锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖²C锛孧MC锛屾櫤鑳藉崱锛孲PI锛孲SI锛孶ART/USART锛孶SB OTG |
| 澶栧湇瑷�(sh猫)鍌欙細 | DMA锛孖²S锛孡CD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 128 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 澶栭儴绋嬪簭瀛樺劜(ch菙)鍣� |
| RAM 瀹归噺锛� | 144K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.15 V ~ 1.52 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 3x12b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 400-LFBGA |
| 鍖呰锛� | 鎵樼洡(p谩n) |
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i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
8
Freescale Semiconductor
I2C(3)
I2C module
Connectivity
peripherals
Inter-IC Communication (I2C) is an industry-standard, bidirectional serial bus
that provides a simple, efficient method of data exchange, minimizing the
interconnection between devices. I2C is suitable for applications requiring
occasional communications over a short distance between many devices.
The interface operates up to 100 kbps with maximum bus loading and timing.
The I2C system is a true multiple-master bus, including arbitration and
collision detection that prevents data corruption if multiple devices attempt to
control the bus simultaneously. This feature supports complex applications
with multiprocessor control and can be used for rapid testing and alignment
of end products through external connections to an assembly-line computer.
IIM
IC
Identification
Module
Security
The IIM provides the primary user-visible mechanism for interfacing with
on-chip fuse elements. Among the uses for the fuses are unique chip
identifiers, mask revision numbers, cryptographic keys, and various control
signals requiring a fixed value.
IOMUX
I/O multiplexer Pins
Each I/O multiplexer provides a flexible, scalable multiplexing solution:
Up to eight output sources multiplexed per pin
Up to four destinations for each input pin
Unselected input paths are held at constant level for reduced power
consumption
KPP
Keypad port
Connectivity
peripherals
KPP can be used for either keypad matrix scanning or general purpose I/O.
LCDC
LCD
Controller
Multimedia
peripherals
LCDC provides display data for external gray-scale or color LCD panels.
LCDC is capable of supporting black-and-white, gray-scale, passive-matrix
color (passive color or CSTN), and active-matrix color (active color or TFT)
LCD panels.
MAX
ARM platform
multilayer
AHB crossbar
switch
ARM platform
MAX concurrently supports up to five simultaneous connections between
master ports and slave ports. MAX allows for concurrent transactions to
occur from any master port to any slave port.
PWM(4)
Pulse width
modulation
Connectivity
peripherals
The Pulse-Width Modulator (PWM) has a 16-bit counter and is optimized to
generate sound from stored sample audio images. It can also generate
tones. The PWM uses 16-bit resolution and a 4x16 data FIFO to generate
sound.
SDMA
Smart DMA
engine
System control
The SDMA provides DMA capabilities inside the processor. It is a shared
module that implements 32 DMA channels.
SIM(2)
Subscriber
identity
module
interface
Connectivity
peripherals
The SIM is an asynchronous interface designed to facilitate communication
with SIM cards or pre-paid phone cards. This module was designed based
on the ISO7816 standard; however, the module does require an external
companion controller to allow communication to certain smart cards or to
pass certain certifications, such as EMV.
The SIM supports only 11 and 12ETU cards and can communicate at the
default rate, which is obtained at Fi/Di=372/1. An external companion
controller is required to support cards aligned on 10.8 or 11.8ETU and to
support other rates, such as those obtained at Fi/Di=372/2 and Fi/Di=372/4.
SJC
Secure JTAG
interface
System control
peripherals
The System JTAG Controller (SJC) provides debug and test control with
maximum security.
Table 3. i.MX25 Digital and Analog Modules (continued)
Block
Mnemonic
Block Name
Subsystem
Brief Description
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| MCIMX251AVM4 | IC MPU I.MX25 AUTO 400MAPBGA |
| 61819-1111BLF | UNIV SERIAL BUS TH LF |
| LPC1226FBD48/301,1 | MCU 32BIT 96K FLASH 8K 48-LQFP |
| 1061541111 | ADPT OPT MULTIMODE FC-SC BEIGE |
| PK30X128VMD100 | IC ARM CORTEX MCU 128K 144-MAP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MCIMX253DJM4 | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸(m茅n)鎳�(y墨ng)鐢� SENNA IMX25 COMM RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
| MCIMX253DJM4A | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸(m茅n)鎳�(y墨ng)鐢� IMX25 1.2 COMM RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
| MCIMX253DVM4 | 鍔熻兘鎻忚堪:IC MPU I.MX25 COMM 400MAPBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:i.MX25 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:260 绯诲垪:73S12xx 鏍稿績铏曠悊鍣�:80515 鑺珨灏哄:8-浣� 閫熷害:24MHz 閫ｉ€氭€�:I²C锛屾櫤鑳藉崱锛孶ART/USART锛孶SB 澶栧湇瑷�(sh猫)鍌�:LED锛孭OR锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):9 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲�:64KB锛�64K x 8锛� 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:2K x 8 闆诲 - 闆绘簮 (Vcc/Vdd):2.7 V ~ 5.5 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:- 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:68-VFQFN 瑁搁湶鐒婄洡(p谩n) 鍖呰:绠′欢 |
| MCIMX255AJM4 | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸(m茅n)鎳�(y墨ng)鐢� IMX25 AUTOMOTIVE RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
| MCIMX255AJM4A | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸(m茅n)鎳�(y墨ng)鐢� IMX25 1.2 AUTO RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
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