參數(shù)資料
型號: MCIMX251AVM4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA400
封裝: 17 X 17 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-400
文件頁數(shù): 18/140頁
文件大小: 1416K
代理商: MCIMX251AVM4
i.MX25 Applications Processor for Automotive Products, Rev. 8
114
Freescale Semiconductor
Figure 83 shows the timing for ADC normal operation.
Figure 83. Timing for ADC Normal Operation
When the ADC is used so that the idle clock cycles occur between conversions (due to the negation of soc),
the selin inputs must be stable at least 1 clock cycle before the clock's rising edge where the soc signal is
latched. Also, selrefp and selrefn must be stable by the time the soc signal is latched. These conditions are
met if enadc=1 and reset=0 throughout ADC operation, including the idle cycles. If the conditions are not
met, or if power is lost during ADC operation, then a new start-up sequence is required for ADC to become
operational again.
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參數(shù)描述
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